Write Operation

The write transfer is determined by the assertion of the granted master's s_apb_pwrite_i. The s_apb_pwrite_i needs to be asserted together with the granted master's s_apb_psel_i, s_apb_paddr_i, s_apb_pwdata_i, s_apb_pwdata_par_i, s_apb_pstrb_i, and s_apb_pstrb_par_i.

At 1 clock cycle after the assertion of the granted master's s_apb_psel_i, the granted master's s_apb_penable_i needs to be asserted to start the write transfer.

Note: If the granted master's s_apb_penable_i does not assert or assert at ≥ 1 clock cycle after the assertion of the s_apb_psel_i, the granted master loses the active priority.

The minimum latency between the granted master's input signals and the slave's interface output signals is 2 clock cycles. Upon receiving a write transfer request from the granted master, the slave may need some time to process the request.

While waiting for the slave to complete the write transfer, the granted master needs to maintain the signal state of s_apb_psel_i, s_apb_penable_i, s_apb_pwrite_i,s_apb_paddr_i, s_apb_pwdata_i, s_apb_pwdata_par_i, s_apb_pstrb_i, and s_apb_pstrb_par_i.

When the slave finishes the write transfer, it asserts apb_pready_i. The APB Interconnect core takes a minimum of 1 clock cycle to propagate the asserted apb_ready_i to the granted master's s_apb_pready_o. The assertion of granted master's s_apb_pready_o marks the end of the current write transfer.

At the end of the write transfer, the granted master needs to deassert s_apb_penable_i and may change the signal state of s_apb_psel_i, s_apb_pwrite_i, s_apb_paddr_i, s_apb_pwdata_i, s_apb_pwdata_par_i, s_apb_pstrb_i, and s_apb_pstrb_par_i for the next APB request (or no request).

Note: Figure 2 to Figure 5 is without pipeline register. The master priority is set as default.

Figure 1. Write Operation with No Wait State

The write operation with no wait state illustrates a situation where the slave responses immediately to the granted master's request, i.e., the slave asserts apb_pready_i at the same clock cycle as the assertion of apb_penable_o.

Figure 2. Write Operation with Wait State

The write operation with wait state is a typical situation, where upon receiving the granted master's request, the slave may take ≥ 1 clock cycle to response.