SGMII Link State Notification Mode

When connecting to an SGMII PHY, the PHY uses the same auto-negotiation mechanism to convey link status information to the MAC as defined in the SGMII specification. Although the same state machine is re-used, the transmitted and received configuration code words have different meanings and should be interpreted appropriately.

To enable SGMII link state notification, set up the following registers prior to release of the datapath resets for the affected port:

SGMII CFG1

The sgmii_an_mode field should be set to 1. The an_link_timeout_val field should already be set to 0x186a0 to provide the required 1.6 ms timeout value in SGMII mode (16 ns clock period). Therefore, you do not need to set anything else.

Once this mode is set up, the operation is autonomous and you only need to monitor the pcs_an_complete_* interrupt pins and take the appropriate action to change the MAC clock frequencies if the PHY indicates it is operating at a different speed. Note that in such cases, the resets for the affected port should be asserted and only de-asserted once the new clocks are stable.