RV32 SoC DS UG
High-Perf RV32 SoC DS UG
RV64 SoC DS UG API and Examples
Embedded IDE UG
  • Sapphire HP RISC-V SoC Hardware Software UG
  • Introduction
    • Efinity RISC-V Embedded Software IDE
    • Required Software
    • Required Hardware
    • Comparison with Sapphire RV32 SoC
    • Performance
  • Install Software and SoC
    • Install the Efinity Software
    • Install the Efinity RISC-V Embedded Software IDE
  • IP Manager
    • Customizing the High-Performance Sapphire RV32 SoC
    • Modify the Bootloader
  • Recommended Design Practice
  • Example Design
    • About the Example Design
    • Enable the LPDDR4x Memory (Ti375 C529 Board)
    • Installing USB Drivers
    • Program the Development Board
  • Boot Sequence
    • Boot Sequence: Case A
    • Boot Sequence: Case B
    • Boot Sequence: Case C
    • Booting Multiple Cores
  • Create Your Own RTL Design
    • Target another FPGA
    • Target Your Own Board
  • Create Your Own Software
    • Deploying an Application Binary
      • Boot from a Flash Device
      • Boot from the OpenOCD Debugger
      • Copy a User Binary to Flash (Efinity Programmer)
      • Converting a User Binary to Raw Hex Format (Efinity Programmer)
    • About the Board Specific Package
    • Address Map
    • Example Software
      • clintTimerInterruptDemo
      • coremark
      • customInstructionDemo
      • dCacheFlushDemo
      • dhrystone Example
      • fatFSDemo
      • FreeRTOS Examples
      • fpuDemo
      • gpioDemo
      • iCacheFlushDemo
      • inlineAsmDemo
      • lwipIperfServer
      • memTest Example
      • nestedInterruptDemo
      • oob Example
      • i2cMasterDemo Design
      • i2cMasterInterruptDemo Design
      • i2cSlaveDemo Design
      • rtcDemo
      • sdhcDemo
      • semihostingDemo
      • smpDemo
      • temperatureSensorDemo
      • uartEchoDemo
      • UartInterruptDemo
      • userTimerDemo
  • Hardware and Software Migration from Sapphire SoC to Sapphire High-Performance SoC
    • Introduction
    • Hardware
    • Software
  • Watchdog Timer
    • Introduction
    • Functional Description
    • Setting Limits for Both Counters
  • Using a UART Module
    • Using the On-board UART
  • Unified Printf
    • Bsp_print
    • Bsp_printf
    • Bsp_printf_full
    • Semihosting Printing
    • Preprocessor Directives
  • Using a Soft JTAG Core for Example Designs
    • Enabling Soft JTAG in Static Example Design
  • API Reference
    • Control and Status Registers
    • GPIO API Calls
    • I2C API Calls
    • I/O API Calls
    • Core Local Interrupt Timer API Calls
    • User Timer API Calls
    • PLIC API Calls
    • SPI API Calls
    • SPI Flash Memory API Calls
    • UART API Calls
    • RISC-V API Calls
    • Handling Interrupts
  • Inline Assembly
    • Introduction
    • Inline Assembly Syntax
      • Operands
    • RISC-V Registers

Inline Assembly

  • Introduction
  • Inline Assembly Syntax
  • RISC-V Registers