Modify the Bootloader

When you generate the High-Performance Sapphire RV32 SoC, the IP Manager does not include any pre-built firmware to target the on-chip RAM size you selected. You can compile SPI flash bootloader software codes in the embedded_sw/efx_hard_soc/software/standalone/bootloader

Notice: You need to install Efinity RISC-V Embedded Software IDE to compile the bootloader or other software.
Note: By default, the bootloader uses only a single data line SPI. To use dual or quad data line SPI, refer to Modify the Bootloader Software to Enable Multi-Data Lines.

Modify the Bootloader Software to Extend the External Memory Size

First you need to modify the bootloader code:
  1. Open the bootloaderConfig.h file in the embedded_sw/efxh_hard_soc/software/standalone/bootloader directory.
  2. Change the #define USER_SOFTWARE_SIZE parameter for the new on-chip RAM size and save.
  3. In Efinity RISC-V Embedded Software IDE, import standalone/bootloader project. Build the project to generate new bootloader.hex file.

Second, you update and regenerate the SoC in the IP Manager to point to your new bootloader.hex and change the application region size. The default maximum size is 324 KB.

  1. In the High-Performance Sapphire RV32 IP wizard, go to the HRB tab.
  2. Turn on the OCR Application option.
  3. Click the Browse button to select the new bootloader.hex you created in the previous set of steps.
  4. Generate the SoC.

Modify the Bootloader Software to Enable Multi-Data Lines

Before utilizing the multi-data lines SPI in your bootloader, ensure your board's flash device supports Dual or Quad I/O modes.

In the Efinity RISC-V Embedded Software IDE example design, data ports 0 and 1 are exclusively connected. If you intend to use the Quad SPI for data transfer, you must establish connections for data ports 2 and 3. The following table shows the number of connected data lines interfacing with the respective FPGAs and flash devices.
Table 1. Multi Data Lines Interface with FPGAs and Flash Devices
Development Kit Flash device Number of Data Lines Connected
Ti375C529 IS25WP512M-JLLA3 4
Ti375N1156 GD25LB512MEYIGR 4
In the bootloaderConfig.h file, you can define your preferred SPI lane configuration by selecting from the following data line modes:
  • SINGLE_SPI: Single data line
  • DUAL_SPI: Dual data line
  • QUAD_SPI: Quad data line
#define SINGLE_SPI 1 //define DUAL_SPI for dual data SPI or QUAD_SPI for quad data SPI

void bsp Main() {
#ifndef SIM
        spiFlash_init(SPI, SPI_CS);
        spiFlash_wake(SPI, SPI_CS);
        spiFlash_exit4ByteAddr(SPI, SPI_CS);
#ifdef SINGLE_SPI
        spiFlash_f2m(SPI, SPI_CS, USER_SOFTWARE_FLASH, USER_SOFTWARE_MEMORY, 
        USER_SOFTWARE_SIZE);
#elif DUAL_SPI
        spiFlash_f2m_dual(SPI, SPI_CS, USER_SOFTWARE_FLASH, USER_SOFTWARE_MEMORY, 
        USER_SOFTWARE_SIZE); //dual data line half duplex
#elif QUAD_SPI
        spiFlash_f2m_quad(SPI, SPI_CS, USER_SOFTWARE_FLASH, USER_SOFTWARE_MEMORY, 
        USER_SOFTWARE_SIZE); //quad data line full duplex
#else
        #error "You must either define SINGLE_SPI to use single data line SPI, DUAL_SPI to use 
        dual data line SPI or QUAD_SPI to use quad data line SPI."
#endif
#endif
        void (*userMain)() = (void (*)())USER_SOFTWARE_MEMORY;
    #ifdef SMP
        smp_unlock(userMain);
    #endif
        userMain();
}
Note: If the flash device is GD25 (from Ti375N1156development kit), add CFLAGS+=-DGD25_FLASH before the LDSCRIPT?=${BSP_PATH}linker/bootloader.Id into the bootloader application's makefile. Defining the GD25 includes the required commands specific to the GD25 flash device.