MIPI DSI TX Controller Example Design
You can choose to generate the example design when generating the core in the IP Manager Configuration window. Compile the example design project and download the .hex or .bit file to your board.
Important: tested the
example design generated with the default parameter options only.
The example design targets the Titanium Ti60 F225 Development Board. This design generates a video stream and sends the video data to a display panel through the MIPI DSI TX Controller. Apart from the Titanium Ti60 F225 Development Board, the example design requires the following hardware:
- Dual MIPI to DSI Converter Daughter Card
- Mini-DSI Panel Connector Daughter Card
- Mini-DSI Panel display
After power-up, press the reset button (SW7), then you should be able to see a video displayed on the panel module.
| FPGA | Logic and Adders | Flip-flops | Memory Blocks | fMAX (MHz)1 | Efinity® Version2 | ||||
|---|---|---|---|---|---|---|---|---|---|
| i_sys_clk | dsi_pclk | i_mipi_pclk | mipi_clk | i_mipi_tx_pclk | |||||
| Ti60 F225 C4 | 4,608 | 1,861 | 15 | 200 | 457 | 304 | 210 | 199 | 2021.2 |
1 Using
default parameter settings.
2 Using
Verilog HDL.