Revision History

Table 1. Revision History
Date Document Version IP Version Description
July 2025 2.7 5.14 Correction on Interrupt Status Register in Control Status Registers R/W access attribute table. (DOC-2609)
Added more details on the Video Timing Parameter Definition table in the Video Timing Parameters topic.
June 2025 2.6 5.13 Added upper bound for pixel clk frequency. (SIP-952)
Added ports to get line and frame number. (SIP-943)
Update reset sequence descriptions. (DOC-2561)
Added table Pixel Sideband Interface in Ports.
Added Note, Video Timing Waveform (Horizontal) - Example for Accurate Frame Mode,and Video Timing Waveform (Vertical) - Example for Accurate Frame Mode in Video Timing Parameters.
Updated Customizing the MIPI 2.5G CSI-2 RX Controller, Pixel Clock Calculation, and Reset Sequence and Initialization.
May 2025 2.5 5.12 Updated example design. (SIP-891)
Example Design IO bank update (HVIO 3.3V). (SIP-907)
Updated Customizing the MIPI 2.5G CSI-2 RX Controller.
Updated observation after downloading bitstream and Example Design Implementation table in Example Design.
Updated Video Interface table.
Added Sideband Interface Ports table. (DOC-2382)
Updated Reset Sequence and Initialization topic. (DOC-2485)
March 2025 2.4 5.11 Updated Resource Utilization and Performance section. (SIP-867)
January 2025 2.3 5.11 Updated Figure Video Timing Waveform (Horizontal), Video Timing Waveform (Vertical). (SIP-823)
Example design update to align with MIPI Utility change (DOC-1783). (SIP-792)
December 2024 2.2 5.10 Added debug ports for internal signal observation and monitoring in Ports and Customizing the MIPI 2.5G CSI-2 RX Controller. (SIP-580)
November 2024 2.1 5.9 Added Topaz in Features and Device Support. (DOC-2102)
Added IP Version in Revision History. (DOC-2185)
Fix byte2pixel conversion issue when ENABLE_VCX = 1. (SIP-759)
September 2024 2.0 Update Reset Sequence and Initialization topic and Figure 1. (DOC-2048)
Updated Features and tINIT_NS in Table 1
Added G400 in Table 1.
Updated pixel data[63:0] in Figure 1.
Removed data type RGB666 from Table 1. (DOC-2068)
July 2024 1.9 Fixed typo in Table 3. (DOC-2004)
June 2024 1.8 Updated Pixel FIFO depth requirement in table MIPI2.5G CSI-2 RX Controller Core Parameter. (SIP-570)
Added Reset Sequence and Initialization sub-section.
Added important note in Example Design and Testbench regarding using default parameters options only. (DOC-1781)
October 2023 1.7
Updated MIPI video data format tables to include RGB information. (DOC-1474)
September 2023 1.6
Corrected supported HS data width. (DOC-1437)
July 2023 1.5 Added more description for Accurate and Generic image frame modes. (DOC-1343)
June 2023 1.4
Corrected signal width and updated the description for RxValidHSn [HS_DATA_WIDTH/8-1:0]. (DOC-1340)
Added Device Support and release notes sections. (DOC-1234)
Updated supported data rate. (DOC-1217)
Updated port descriptions.
Added RAW16, RAW20, RAW24, and RAW28 format support.
Updated IP Core Frequency, Pixel Data FIFO Depth Size, Pack Type40, Pack Type48, Pack Type56, Pack Type64 parameters.
Improved Interrupt Enable Register Definition descriptions.
Editorial changes.
February 2023 1.3 Added note about the resource and performance values in the resource and utilization table are for guidance only.
December 2022 1.2 Updated PHY-Protocol Interface descriptions by indicating the clock domains. (DOC-1022)
Added New in Version section.
August 2022 1.1 Updated parameters for IP Manager support in Efinity software v2022.1.
August 2022 1.0 Initial release.