Introduction
The MIPI CSI-2 interface, which defines a simple, high-speed protocol, is the most widely used camera interface for mobile1. Adding a MIPI interface to an FPGA creates a powerful bridge to transmit or receive high-speed video data easily to/from an application processor. The MIPI 2.5G CSI-2 RX Controller core allows you to perform complex video and image processing as a part of a complete system solution with a data rate of up to 2.5 Gbps. The MIPI 2.5G CSI-2 RX Controller uses the hard MIPI D-PHY blocks in supported Titanium FPGAs.
Use the IP Manager to select IP, customize it, and generate files. The MIPI 2.5G CSI-2 RX Controller core has an interactive wizard to help you set parameters. The wizard also has options to create a testbench and/or example design targeting an Efinix® development board.