DC and Switching Characteristics

Table 1. Absolute Maximum Ratings1 Conditions beyond those listed may cause permanent damage to the device. Device operation at the absolute maximum ratings for extended periods of time has adverse effects on the device.
Symbol Description Min Max Units
VCC Core power supply. -0.5 1.05 V
VCCA PLL analog power supply. -0.5 1.05 V
VCCAUX 1.8 V auxiliary power supply. -0.5 1.98 V
VQPS 1.8 V security fuse supply. -0.5 1.98 V
VCCIO HSIO bank power supply. -0.5 1.98 V
VCCIO33 HVIO bank power supply. -0.5 3.63 V
IIN Maximum current allowed through any I/O pin when the device is not turned on or during power-up/down with forward biasing of the clamp diode.2 – 10 mA
VIN HVIO input voltage. -0.5 3.63 V
HSIO input voltage. -0.5 1.98 V
TSTG Storage temperature, ambient. -55 150 °C
Table 2. Recommended Operating Conditions 1
Symbol Description Min Typ Max Units
VCCAUX 1.8 V auxiliary power supply. 1.75 1.8 1.85 V
VQPS 1.8 V security fuse supply. 1.71 1.8 1.89 V
VCCIO 1.2 V HSIO bank power supply. 1.14 1.2 1.26 V
1.35 V HSIO bank power supply 1.283 1.35 1.417 V
1.5 V HSIO bank power supply. 1.425 1.5 1.575 V
1.8 V HSIO bank power supply. 1.71 1.8 1.89 V
VCCIO33 1.8 V HVIO bank power supply. 1.71 1.8 1.89 V
2.5 V HVIO bank power supply. 2.375 2.5 2.625 V
3.0 V HVIO bank power supply. 2.85 3.0 3.15 V
3.3 V HVIO bank power supply. 3.135 3.3 3.465 V
TJCOM Operating junction temperature, commercial. 0 – 85 °C
TJIND Operating junction temperature, industrial. -40 – 100 °C
Table 3. Power Supply Ramp Rates
Symbol Description Min Max Units
tRAMP Power supply ramp rate for all supplies.
0.1 * Vsupply
 10 V/ms
Table 4. HVIO DC Electrical Characteristics
I/O Standard VIL (V) VIH (V) VOL (V) VOH (V)
Min Max Min Max Max Min
3.3 V LVCMOS -0.3 0.8 2.1 3.465 0.2 VCCIO33 - 0.2
3.0 V LVCMOS -0.3 0.8 2.1 3.15 0.2 VCCIO33 - 0.2
3.3 V LVTTL -0.3 0.8 2.1 3.465 0.4 2.4
3.0 V LVTTL -0.3 0.8 2.1 3.15 0.4 2.4
2.5 V LVCMOS -0.3 0.45 1.7 2.625 0.4 2.0
1.8 V LVCMOS -0.3 0.58 1.27 1.89 0.45 VCCIO33 - 0.45
Table 5. HSIO Pins Configured as Single-Ended I/O DC Electrical Characteristics
I/O Standard VIL (V) VIH (V) VOL (V) VOH (V)
Min Max Min Max Max Min
1.8 V LVCMOS -0.3 0.58 1.27 1.89 0.45 VCCIO - 0.45
1.5 V LVCMOS -0.3 0.35 * VCCIO 0.65 * VCCIO 1.575 0.25 * VCCIO 0.75 * VCCIO
1.2 V LVCMOS -0.3 0.35 * VCCIO 0.65 * VCCIO 1.26 0.25 * VCCIO 0.75 * VCCIO
1.8 V HSTL – VREF - 0.1 VREF + 0.1 – 0.4 VCCIO - 0.4
1.5 V HSTL – VREF - 0.1 VREF + 0.1 – 0.4 VCCIO - 0.4
1.2 V HSTL -0.15 VREF - 0.08 VREF + 0.08 VREF + 0.15 0.25 * VCCIO 0.75 * VCCIO
1.8 V SSTL -0.3 VREF - 0.125 VREF + 0.125 VCCIO + 0.3 VTT - 0.603 VTT + 0.603
1.5 V SSTL – VREF - 0.1 VREF + 0.1 – 0.2 * VCCIO 0.8 * VCCIO
1.35 V SSTL – VREF - 0.1 VREF + 0.1 – 0.2 * VCCIO 0.8 * VCCIO
1.2 V SSTL – VREF - 0.1 VREF + 0.1 – 0.2 * VCCIO 0.8 * VCCIO
Table 6. HSIO Pins Configured as Single-Ended I/O DC Electrical Characteristics
I/O Standard VREF (V) Vtt (V)
Min Typ Max Min Typ Max
1.8 V HSTL 0.85 0.9 0.95 – 0.5 * VCCIO –
1.5 V HSTL 0.68 0.75 0.9 – 0.5 * VCCIO –
1.2 V HSTL 0.47 * VCCIO 0.5 * VCCIO 0.53 * VCCIO – 0.5 * VCCIO –
1.8 V SSTL 0.833 0.9 0.969 VREF - 0.04 VREF VREF + 0.04
1.5 V SSTL 0.49 * VCCIO 0.5 * VCCIO 0.51 * VCCIO 0.49 * VCCIO 0.5 * VCCIO 0.51 * VCCIO
1.35 V SSTL 0.49 * VCCIO 0.5 * VCCIO 0.51 * VCCIO 0.49 * VCCIO 0.5 * VCCIO 0.51 * VCCIO
1.2 V SSTL 0.49 * VCCIO 0.5 * VCCIO 0.51 * VCCIO 0.49 * VCCIO 0.5 * VCCIO 0.51 * VCCIO
Table 7. HSIO Pins Configured as Differential SSTL I/O Electrical Characteristics
I/O Standard VSWING (DC) (V) VX(AC) (V) VSWING (AC) (V)
Min Max Min Typ Max Min Max
1.8 V SSTL 0.25 VCCIO + 0.6 VCCIO/2 – 0.175 – VCCIO/2 + 0.175 0.5 VCCIO + 0.6
1.5 V SSTL 0.2 – VCCIO/2 – 0.15 – VCCIO/2 + 0.15 0.35 –
1.35 V SSTL 0.2 – VCCIO/2 – 0.15 – VCCIO/2 + 0.15 0.35 –
1.2 V SSTL 0.18 – VREF– 0.15 VCCIO /2 VREF + 0.15 -0.3 0.3
Table 8. HSIO Pins Configured as Differential HSTL I/O Electrical Characteristics
I/O Standard VDIF (DC) (V) VX (AC) (V) VCM (DC) (V) VDIF (AC) (V)
Min Max Min Typ Max Min Typ Max Min Max
1.8 V HSTL 0.2 – 0.78 – 1.12 0.78 – 1.12 0.4 –
1.5 V HSTL 0.2 – 0.68 – 0.9 0.68 – 0.9 0.4 –
1.2 V HSTL 0.16 VCCIO + 0.3 – 0.5 * VCCIO – 0.4 * VCCIO 0.5 * VCCIO 0.6 * VCCIO 0.3 VCCIO + 0.48
Table 9. Supported HVIO Drive Strength
I/O Standard Drive Strength Units
3.3 V LVTTL 4, 8, 12, 16 mA
3.3 V LVCMOS 2, 4, 6, 8 mA
3.0 V LVTTL 4, 8, 12, 16 mA
3.0 V LVCMOS 2, 4, 6, 8 mA
2.5 V LVCMOS 4, 8, 12, 16 mA
1.8 V LVCMOS 4, 8, 12, 16 mA
Table 10. Supported HSIO Drive Strength
I/O Standard Drive Strength Units
1.8 V LVCMOS 4, 8, 12, 16 mA
1.5 V LVCMOS 4, 8, 12, 16 mA
1.2 V LVCMOS 2, 4, 8, 12 mA
1.8 V SSTL 4, 8, 10, 12 mA
1.5 V SSTL 4, 8, 10, 12 mA
1.35 V SSTL 4, 8, 10, 12 mA
1.2 V SSTL 4, 8, 10, 12 mA
1.8 V HSTL 4, 8, 10, 12 mA
1.5 V HSTL 4, 8, 10, 12 mA
1.2 V HSTL 4, 8, 10, 12 mA
Table 11. HVIO Maximum Toggle Rate
I/O Standard Speed Grade Serialization Mode Max Toggle Rate (Mbps)34
3.0 V, 3.3 V LVTTL
3.0 V, 3.3 V LVCMOS
 All – 200
2.5 V LVCMOS All – 100
1.8 V LVCMOS All – 400
Table 12. HVIO Internal Weak Pull-Up and Pull-Down Resistance
I/O Standard Internal Pull-Up Internal Pull-Down Units
Min Typ Max Min Typ Max
3.3 V LVTTL/LVCMOS 25 42 67 24 29 33 kΩ
3.0 V LVTTL/LVCMOS 25 42 67 24 29 33 kΩ
2.5 V LVCMOS 25 42 67 24 29 33 kΩ
1.8 V LVCMOS 25 35 45 24 29 33 kΩ
Table 13. Single-Ended I/O Programmable Delay Chain Step Size: Static
Speed Grade Delay per Step Units
Min Typ Max
C3, C4, I3 35 55 75 ps
C3L, C4L, I3L 50 68 89 ps
Table 14. Single-Ended I/O Programmable Delay Chain Step Size: Dynamic
Speed Grade Delay per Step Units
Min Typ Max
C3, C4, I3 12 18 24 ps
C3L, C4L, I3L 15 22 28 ps
1 Supply voltage specification applied to the voltage taken at the device pins with respect to ground, not at the power supply.
2 Should not exceed a total of 100 mA per bank
3 The maximum toggle rate is dependent on the drive strength and external load conditions. Perform IBIS simulation to determine the optimal drive strength setting to achieve the targeted toggle rate.
4 All I/O standards are characterized with 5 pF load, except for LVTTL and LVCMOS standards which are characterized with 15 pF load.