Ti35 Power-Up Sequence (No VQPS)

Important: This sequence applies to Titanium™ FPGAs in F100S3F2 and F225 packages that do not have the letter S in the lot number. For F100S3F2 and F225 packages with the letter S in the lot number as well as F100 and F256 packages (all lots), refer to Ti35 Power-Up Sequence (VQPS). See PCN-2405-001 for details.

You must use the following power-up sequence:

Figure 1. Power-Up Sequence
Important: You can only use one configuration channel at a time. Using SPI passive and JTAG at the same time can result in configuration failure.
  1. Power-up VCC and VCCA_xx first. These supplies can be powered up in any sequence.
  2. When VCC and VCCA_xx are stable, power-up all VCCIO and VCCAUX. These supplies can be powered up in any sequence.
    Important: Ensure the power ramp rate is within the Table 3.
  3. After all power supplies are stable, hold CRESET_N low for a duration of tCRESET_N before releasing CRESET_N from low to high.
    Note: With the configuration bitstream stored in the SPI flash device and the SPI active hardware connection properly established, the SPI active configuration automatically starts after the CRESET_N signal transitions from low to high.
Note: Refer to Ti35 Configuration Timing for configuration timing information.