Ti135 I/O Banks

Efinix FPGAs have input/output (I/O) banks for general-purpose usage. Each I/O bank has independent power pins. The number and voltages supported vary by FPGA and package.

Some I/O banks are merged at the package level by sharing VCCIO pins, these are called merged banks. Merged banks have underscores (_) between banks in the VCCIO name (e.g., 1B_1C means VCCIO for bank 1B and 1C are connected). Some of the banks in a merged bank may not have available user I/Os in the package. The following table lists banks that have available user I/Os in a package.

Table 1. I/O Banks by Package

Package	I/O Banks	Voltage (V)	Dynamic Voltage Support	DDIO Support	Merged Banks
N441	2A, 2B, 2C, 4A, 4B	1.2, 1.35, 1.5, 1.8	–	All	–
	BL2, BR0, BR1, TL3, TR1	1.8, 2.5, 3.0, 3.3		All	–
N484	2A, 2B, 2C, 4A, 4B	1.2, 1.35, 1.5, 1.8	–	All	–
	BL3, TR1, BR0, BR1	1.8, 2.5, 3.0, 3.3		All	BR1_BL3
N576	2A, 2B, 2C, 4A, 4B	1.2, 1.35, 1.5, 1.8	–	All	–
	BL2, BL3, BR0, BR1, TL3, TR1	1.8, 2.5, 3.0, 3.3		All	–
N576D2F4	2A, 2B, 2C, 4A, 4B	1.2, 1.35, 1.5, 1.81	–	All	–
	BL1, BL2, BL3, BR0, BR1, TL2, TL3, TR1	1.8, 2.5, 3.0, 3.3		All	–
N676	2A, 2B, 2C, 4A, 4B	1.2, 1.35, 1.5, 1.8	–	All	–
	BL0, BL1, BL2, BL3, BR0, BR1, TL2, TL3, TR1, TR2, TR3, TR5	1.8, 2.5, 3.0, 3.3		All	–