T20 JTAG

Figure 1. JTAG Programming Waveform (WLCSP80, Q100F3, Q144, F169, and F256 Packages)
The SPI bus must be inactive during JTAG configuration.
Important: Refer to T20 Power Up Sequence for power-up details.

Table 1. JTAG Mode Timing Parameters (W80, Q100F3, Q144, F169, and F256 Packages)
Symbol Parameter Min Typ Max Units
fTCK TCK frequency. – – 25 MHz
tTDISU TDI setup time. 3.5 – – ns
tTDIH TDI hold time. 1 – – ns
tTMSSU TMS setup time. 3 – – ns
tTMSH TMS hold time. 1 – – ns
tTCKTDO TCK falling edge to TDO output. – – 10.51 ns
tDMIN Minimum time between deassertion of CRESET_N to first valid configuration data. 1.2 – – μs

Figure 2. JTAG Programming Waveform (F324 and F400 Packages)
The SPI bus must be inactive during JTAG configuration.
Important: Refer to T20 Power Up Sequence for power-up details.

Table 2. JTAG Mode Timing Parameters (F324 and F400 Packages)
Symbol Parameter Min Typ Max Units
fTCK TCK frequency. – – 25 MHz
tTDISU TDI setup time. 3.5 – – ns
tTDIH TDI hold time. 2.5 – – ns
tTMSSU TMS setup time. 3 – – ns
tTMSH TMS hold time. 2.5 – – ns
tTCKTDO TCK falling edge to TDO output. – – 10.5 ns
tDMIN Minimum time between deassertion of CRESET_N to first valid configuration data. 1.2 – – μs
Note: Refer to T20 Power Up Sequence for details on the power-up requirements.
1 0 pf output loading.