25static size_t user_flash_count = 0;
29 user_flash_table = table;
30 user_flash_count = count;
37 if (!IS_VALID_CPOL(spi->
cpol)) {
41 if (!IS_VALID_CPHA(spi->
cpha)) {
45 if (!IS_VALID_MODE(spi->
mode)) {
75 flash-> mask_qe = 0x0;
103 spiFlash_wake_(flash);
129 u8 data = spiFlash_readId_(flash);
146 if (user_flash_table != NULL) {
147 for (
size_t i = 0; i < user_flash_count; i++) {
148 if (user_flash_table[i].jedec_id == detected_id)
149 return &user_flash_table[i];
155 for (
size_t i = 0;
known_flash[i].part_no != NULL; i++) {
177 if (flash->
info == NULL) {
257 spi_write(inst, (flashAddress>>16) & 0xFF);
258 spi_write(inst, (flashAddress>>8) & 0xFF);
259 spi_write(inst, (flashAddress>>0) & 0xFF);
260 for(
int i=0; i<len; i++)
275 spi_write(inst, (flashAddress>>16) & 0xFF);
276 spi_write(inst, (flashAddress>>8) & 0xFF);
277 spi_write(inst, (flashAddress>>0) & 0xFF);
278 for (
u32 i = 0; i < len; i++)
325 spiFlash_f2m_single_(flash, flashAddress, memoryAddress, size);
332 spiFlash_f2m_dual_(flash, flashAddress, memoryAddress, size);
340 spiFlash_f2m_quad_(flash, flashAddress, memoryAddress, size);
444 if((out & 0x01) ==0x00)
461 spi_write(inst, (flashAddress>>16)&0xFF);
479 u8 *ram = (
u8 *) memoryAddress;
480 for(
u32 idx = 0;idx < size;idx++){
495 u8 *ram = (
u8 *) memoryAddress;
496 for(
u32 idx = 0;idx < size;idx++){
511 uint8_t *ram = (uint8_t *) memoryAddress;
512 for(
u32 idx = 0;idx < size;idx++){
Board Support Package API definitions.
#define bsp_uDelay(usec)
Microsecond delay function using CLINT timer.
#define LOG_WARN(mod, fmt,...)
Log a warning message (yellow).
#define LOG_INFO(mod, fmt,...)
Log an informational message (green).
#define LOG_ERR(mod, fmt,...)
Log an error message (red).
#define DBG_MOD_SPI_FLASH
SPI Flash driver.
#define DBG_MOD_RTC
Real-Time Clock driver.
const spiFlash_info_t known_flash[]
Internal table of factory-supported SPI Flash devices.
@ FULL_DUPLEX_SINGLE_LINE
Full-duplex mode using single data lin.
@ HALF_DUPLEX_QUAD_LINE
Half-duplex mode using quad data lin.
@ HALF_DUPLEX_DUAL_LINE
Half-duplex mode using dual data lin.
@ LOW
Clock is low when id.
@ DATA_SAMPLED_RISE_EDGE
Data sampled on rising clock ed.
#define FLAG_QE_ENABLE_VIA_SR
Check if QE requires a Status Register Write.
#define FLAG_QE_SR1_BIT6
Method B: Macronix/ISSI Style (Status Register 1).
#define FLAG_4BYTE_EXIT_ISSI
Quirk: ISSI-Specific 4-Byte Exit.
#define FLAG_UNLOCK_ON_PROBE
Quirk: Auto-Lock on Power Up.
#define FLAG_4BYTE_SUPPORT
Supports 4-Byte Addressing Mode.
spiFlash_status_t
SPI Flash transfer mode configuration.
@ SPI_FLASH_OK
Successful Operation.
@ SPI_FLASH_ERR
Unknown JEDEC ID, Electrical failure (0x00/0xFF).
@ SPI_FLASH_SKIP
Skip the function.
u8 spiFlash_write_single(spiFlash_instance_t *flash, u32 flashAddress, u8 *src, u32 len)
Write N byte to Flash using standard write mode via single Data Line.
void spiFlash_writeStatusReg(spiFlash_instance_t *flash, u8 data)
Write Status Register.
void spiFlash_eraseSector(spiFlash_instance_t *flash, u32 flashAddress)
Erases a sector of the SPI flash given an address.
void spiFlash_f2m_dual(spiFlash_instance_t *flash, u32 flashAddress, uintptr_t memoryAddress, u32 size)
This function read data from FlashAddress and copy to memoryAddress of specific size with dual data l...
void spiFlash_enableQPI(spiFlash_instance_t *flash)
Set Write Enable Latch and send CMD 0x38 to enable QPI Mode.
spiFlash_status_t spiFlash_probe(spiFlash_instance_t *flash)
Main wrapper function to initialize the SPI Flash.
void spiFlash_unlockGlobal(spiFlash_instance_t *flash)
Globally unlocks the SPI flash.
void spiFlash_applyConfig(spiFlash_instance_t *flash)
Apply stored SPI Flash configuration to hardware.
spiFlash_status_t spiFlash_verify(spiFlash_instance_t *flash)
Verify spiFlash.
spiFlash_status_t spiFlash_waitBusy(spiFlash_instance_t *flash)
Wait for spiFlash to be free.
u8 spiFlash_readId(spiFlash_instance_t *flash)
Select and Read Device ID from spiFlash.
void spiFlash_read_single(spiFlash_instance_t *flash, u32 flashAddress, u8 *buffer, u32 len)
Read N byte from Flash using standard read mode via single Data Line.
u8 spiFlash_readStatusReg(spiFlash_instance_t *flash)
Read Status Register.
void spiFlash_f2m_quad(spiFlash_instance_t *flash, u32 flashAddress, uintptr_t memoryAddress, u32 size)
This function read data from FlashAddress and copy to memoryAddress of specific size with quad data l...
void spiFlash_applyQuirks(spiFlash_instance_t *flash)
Handle those spiFlash that have unique register/way.
u8 spiFlash_exit4ByteAddr(spiFlash_instance_t *flash)
Exit 4-byte addressing.
void spiFlash_enableWrite(spiFlash_instance_t *flash)
Set Write Enable Latch (WEL) to 1.
u32 spiFlash_readJedecId(spiFlash_instance_t *flash)
Select and read JEDEC ID from spiFlash.
const spiFlash_info_t * spiFlash_lookup(u32 detected_id)
Identify SPI Flash by looking up User Flash Table and known flash table.
void spiFlash_lockGlobal(spiFlash_instance_t *flash)
Globally locks the SPI flash.
void spiFlash_enableQuadMode(spiFlash_instance_t *flash)
Set Write Enable Latch and set Quad Enable bit to enable Quad Mode.
void spiFlash_f2m_single(spiFlash_instance_t *flash, u32 flashAddress, uintptr_t memoryAddress, u32 size)
This function read data from FlashAddress and copy to memoryAddress of specific size with single data...
void spiFlash_registerFlash(const spiFlash_info_t *table, size_t count)
Register Custom Flash to the driver.
void spiFlash_wake(spiFlash_instance_t *flash)
Select spi and wake up SPI Flash.
void spiFlash_initController(spiFlash_instance_t *flash)
Initialize SPI setting.
#define CMD_ENABLE_QPI
To enable Quad Mode, need to write to this register for (*GigaDevice Quirk).
#define CMD_PAGE_PROGRAM
Standard Write Page (256 Bytes).
#define CMD_READ_STATUS_REG_1
Standard Read Status Register 1 (WIP, WEL, BP).
#define CMD_SECTOR_ERASE
Standard Erase 4KB Sector.
#define CMD_GLOBAL_UNLOCK
Standard Global Block Unlock.
#define QE_BIT6
This Macro specifically for Macronix & ISIS Flash to enable Quad Mode.
#define CMD_WRITE_STATUS_REG_1
Standard Write SR1 (Macronix/ISSI/Standard).
#define CMD_GLOBAL_LOCK
Standard Global Block Lock.
#define CMD_READ_DATA
Standard Read (up to 33MHz).
#define CMD_FAST_READ
Standard Read at higher speed.
#define CMD_READ_DEVICE_ID
Standard Read device ID (legacy).
#define CMD_EXIT_4B_ISSI
Exit 4-Byte Mode (*ISSI Quirk).
#define CMD_WRITE_ENABLE
Standard Set WEL Bit.
#define CMD_DUAL_OUTPUT_READ
Standard Double throughput in read mode.
#define CMD_QUAD_OUTPUT_READ
Standard Quad throughput in read mode.
#define CMD_EXIT_4B
Standard Exit 4-Byte Mode (Standard).
#define CMD_READ_JEDEC_ID
Standard Read JEDEC ID (Manuf + Type + Cap).
#define CMD_RELEASE_DEEP_POWER_DOWN
Standard Release flash from deep power down.
#define WEL_BIT
Write Enable Latch Bit in Status Reg.
u8 spi_read(spi_instance_t *inst)
Reads an 8-bit data value from the SPI read register.
void spi_waitUntilIdle(spi_instance_t *inst)
Waits for SPI if it has any command waiting to be executed in queue.
void spi_applyConfig(spi_instance_t *inst)
Applies the current configuration settings stored in the spi_instance_t structure to the SPI hardware...
void spi_write(spi_instance_t *inst, u8 data)
Writes an 8-bit data value to the SPI data register.
void spi_deselect(spi_instance_t *inst, u32 cs)
Deselects the SPI slave by deasserting the corresponding chip select (CS) line.
void spi_setDataMode(spi_instance_t *inst, enum cfg_mode mode)
Set SPI Data Mode (Full/Half Duplex, Dual/Quad Line).
void spi_select(spi_instance_t *inst, u32 cs)
Selects the SPI slave by asserting the corresponding chip select (CS) line.
SPI Flash driver API definitions.
SPI instance. Holds the software registers and hardware pointer.
enum cfg_mode mode
Stored Transfer Mode.
u32 ssSetup
Slave Select Setup Cycles.
u32 clkDivider
Clock Divider Value.
enum cfg_cpol cpol
Stored Clock Polarity.
enum cfg_cpha cpha
Stored Clock Phase.
u32 ssHold
Slave Select Hold Cycles.
u32 ssDisable
Slave Select Disable Cycles.
SPI Flash Device Descriptor.
const char * part_no
String representation of Part Number (e.g., "W25Q128").
flash_hook post_init_hook
Optional callback (NULL if unused).
u32 flags
Capability Flags (Flash Capability Flags).
SPI Flash instance structure.
u32 detected_id
JEDEC_ID = Manu_id, mem_type, capacity.
u8 cmd_exit_4byte
CMD for exit 4 byte addressing.
u8 mask_qe
CMD for Quad Enable Bit.
u8 cmd_wr_status
CMD for Write Status.
const spiFlash_info_t * info
Flash Descriptor.
u8 cmd_rd_status
CMD for Read Status.
spi_instance_t * inst
Pointer to shared SPI Master.