Ti95 Single-Event Upset Detection and Correction

The Ti95 FPGA has a hard block for detecting and correcting single-event upset (SEU) events. With this feature, some CRAM errors caused by SEU events (e.g., gamma ray radiation flipping the value of a configured CRAM cell) can be corrected while the system remains running in user mode, thus avoiding the need to reconfigure the FPGA.

SEU Detection

The SEU detection feature has two modes:
  • Auto mode—The Ti95 control block periodically runs SEU error checks and flags if it detects an error. You can configure the interval time between SEU checks.
  • Manual mode—The user design runs the check.
In both modes, the user design is responsible for deciding whether to reconfigure the Ti95 when an error is detected.

SEU Correction

The FPGA's CRAM bits are arranged in frames; each frame includes CRAM bits and reserved bits that store the computed ECC parity bits for the frame.

The Ti95 SEU correction feature supports single error correction and double error detection (SEC-DED), and can correct a single-bit error in any given frame. If the SEU correction circuitry detects SEU errors in multiple frames, but each frame is only affected by a single-bit error, the SEU correction circuitry can correct all of the errors. If the SEU correction circuitry detects two or more flipped bits in a given frame, the SEU correction circuitry notifies the user of an unfixable error. If the FPGA has one or more unfixable errors, you must re-configure the FPGA to clear them.

Note: SEU correction is only supported in Q3 speed grades.

The SEU correction feature has four modes:

  • Autofix mode—The SEU correction circuitry automatically corrects single-bit errors. The user application receives a message if the hardware identifies and corrects any errors during the SEU check.
  • Manual mode—The SEU correction circuitry pauses when the SEU check encounters a single-bit error. You can choose to correct the error or continue the SEU check without correction.
  • Monitor mode—The SEU correction circuitry continues the SEU check without correcting single-bit errors. You receive a message if the hardware identifies any errors during the SEU check.
  • Timer mode—The SEU correction circuitry pauses when the SEU check encounters a single-bit error. You can choose to correct the error or continue the SEU check without correction. If your set timer interval passess without user input, the SEU check continues to the next frame without attempting a correction.
Notice: For more information on using the SEU detection and correction features, refer to AN 078: Using SEU Features.