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Unlike most other ISA designs, it is made available under an open-source license that does not require any formal license from a semiconductor vendor. The standard has several levels of instruction sets, including 32-bit and 64-bit varieties, and vendors are even licensing soft cores that can run in a variety of hardware implementations. With access to an open-source implementation, innovative developers can build on top of a proven platform and quickly innovate new products.
FPGAs already offer several benefits at all stages of product development, both as prototyping tools and as a system’s primary compute element. Today, RISC-V implementations are now possible with soft cores available as IP from FPGA vendors, and the industry has moved quickly to embrace this open-source standard. Now it’s never been easier to start building RISC-V implementations that are specialized for advanced applications.
What is RISC-V?
The RISC-V architecture was originally developed by a group of researchers at the Parallel Computing Laboratory (Par Lab) at UC Berkeley under public and private funding agreements. Prior versions of RISC (I-IV) had been developed since 1981. The first hardware implementation was built on 28 nm FD-SOI in 2011 to illustrate the benefits of such an open architecture. The RISC-V foundation would later be founded with 36 member organizations and the specification was put into the public domain under a Creative Commons license. Today, the RISC-V source is managed as an open-source software project.
Since its inception, interest in RISC-V-based implementations has continued to grow among industry and academia. The specification is attractive because it is a free and open standard to which software can be ported, and anyone can develop their own compatible hardware platforms. This is in contrast to x86 or ARM implementations, which must be licensed from vendors in order to access the IP required to build an implementation and take a product to market. The RISC-V standard opens the door to innovators who might otherwise not have the resources to build their own ISA or license a vendor’s ISA.
The RISC-V standard offers an important group of technical capabilities that set it apart from proprietary ISAs. The specification is built to be used either as a standalone implementation, or extended to specific applications with additional instructions that a developer wants to instantiate.
- Modularity - The RISC-V specification was built to have a modular architecture. The specification includes a set of base instructions and optional extensions. The ISA extensions can be enabled or disabled as needed.
- Memory - Officially, the RISC-V instruction set can support 32, 64, and 128-bit word widths. However, the 128-bit width remains undefined due to the lack of industry experience in implementing system architectures that can support such large word widths.
- Extensibility - The base specification and standard extensions can be used immediately in a hardware implementation alongside peripherals in a new chip design to build a simple computer. However, it is also extensible into a proprietary implementation from the base specification by adding a set of user-defined extensions.
- Acceleration - The optimized instruction set in RISC-V reduces compute overhead when deployed on a power optimized hardware platform, particularly on an FPGA. Developers can maximize compute density and minimize power consumption through an optimized RISC-V implementation.
With these capabilities available as open-source development libraries and software, developers can more quickly bring a new product to market with more control over the operation of their hardware.
Why Use RISC-V Cores?
Clearly, there are multiple advantages from the perspective of hardware capabilities, as well as for application developers. Hardware implementations of RISC-V can be highly application-specific chipsets because the implementation is not mandated at the ISA level.
Open-source - The first and most obvious reason to use a RISC-V-based implementation is the fact that the standard is open-source. There is no license fee required to access the ISA and begin using it to develop new products. This translates into faster time to market and reduced development effort, as well as the ability to build a totally custom standard and create a new business model around core IP based on an open instruction set.
Community guidance - Whenever an open-source project becomes successful, a thriving community starts to grow around the project. RISC-V is no different, and now a community of RISC-V developers can be leveraged for development advice, open-source implementation projects, and new versions of the standard. The level of community support for RISC-V is still growing, but vendor IP based on the RISC-V standard is also emerging to fill in the gaps.
RISC-V vs. ARM - The ARM architecture is proprietary and requires a license to use when building a processor. ARM developers can only use the ARM ISA to build a new processor without customization, although this is changing. Hardware developers can do much more with RISC-V; they can develop extensions on top of RISC-V that extends its capabilities beyond the core instruction set. Vendors could even develop their own proprietary version of RISC-V, where the open ISA is still used but the vendor IP is still available for license.
While the main advantages of RISC-V surround the business model for embedded systems development, there are technical reasons to move to RISC-V-based systems. Developers can build on top of the base specification and implement precisely the instruction groups needed for their application without having to pay for unused chip area. Applications like IoT, mobile, edge computing, wearables, vision systems, and sensor fusion often require some optimization and tradeoffs between power consumption and compute density.
In addition to these high-level points, application developers
- The RISC-V architecture helps reduce overhead that is responsible for power-inefficient computation in high compute applications.
- Customizability of the specification allows a product to be built to high specificity, yet it is still possible the custom extensions can be made interoperable with custom logic.
- Aspects like security in RISC-V are comparable to those measures implemented in ARM and x86.
- RISC-V developers can optimize performance by combining applications that use standard and custom ISA extensions.
Applications that require high specificity on customized hardware platforms may be best built using a RISC-V implementation. Similarly, if a company wants to develop their own IP without starting from scratch, the RISC-V architecture provides a solid foundation for building a portfolio of proprietary development resources that eventually form a complete product line.
Due to the significant advantages of the RISC-V architecture, prominent semiconductor manufacturers are now releasing their own RISC-V compatible products that take advantage of the standard’s open ISA. This move towards supporting a popular open-source framework helps spur innovation and broadens the potential developer base for new embedded products. Less reliance on proprietary ISAs means companies can also develop their own RISC-V variants that differentiate products.
Getting Started With RISC-V Development
With RISC-V being open source, anyone can download the original source code from the risc-v.org website or from GitHub. Users can then build a RISC-V implementation using vendor development tools, typically by starting from a reference design. Thanks to semiconductor vendor support for RISC-V-based implementations and multiple open-source options,
- Find a known working reference design that offers the desired feature set or application acceleration.
- Purchase vendor development products and begin customizing the design to meet application need.
- Start with an open-source core that can be freely downloaded and used as-is.
Paths #1 and #2 would normally require a license from a semiconductor vendor, and part #3 was practically non-existent before RISC-V. The use of RISC-V makes #3 a viable option for developers that want to build custom processors for highly specific compute tasks.
The path to market can be reduced even further through implementation on an FPGA. The merging of open-source or vendor provided core designs with FPGA development is a perfect path for developing custom hardware, but without the manufacturing costs and complexities that come with building a custom ASIC. For smaller fabless companies that want to produce new products at scale, FPGAs are the ideal choice.