Efinity® Integrated Development
Environment

Efinity IDE Overview

Trion logoThe Efinix® Efinity® IDE provides a complete RTL-to-bitstream flow. With a simple, easy to use GUI interface and command-line scripting support, the Efinity software provides the tools you need to build designs for Trion® FPGAs.

Features:

  • Project management to keep your design files organized
    • Support for Verilog HDL, SystemVerilog, and VHDL languages
    • Graphical views of design hierarchy, result files, and reports
  • Easy to use dashboard to run through the flow (synthesis, placement, routing, bitstream generation) automatically or manually
  • Interface Designer to constrain logic and assign pins to blocks in the device periphery
  • Floorplan Editor to browse through your design's logic and routing placement
  • Timing Browser and static timing analysis to measure your design's performance
    • Tcl Command Console to perform timing analysis
  • Supports simulation flows using the ModelSim, NCSim, or free iVerilog simulators
  • Integrated hardware Debugger with Logic Analyzer and Virtual I/O debug cores
  • GUI and command-line Programmer to configure your Trion FPGA or Quantum™ core

Documentation

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Efinity Software Example Screen Shots

Efinity Software

Video Gallery

The following videos walk you through how to use the Efinity Interface Designer.

Interface Designer Overview
Efinity v2019.3

How to Create GPIO Blocks
Efinity v2019.3

How to Create LVDS Blocks
Efinity v2019.3


How to Create Simple PLL Blocks
Efinity v2019.3

How to Create Advanced PLL Blocks
Efinity v2019.3

How to Create MIPI Blocks
Efinity v2019.3

How to Create DDR DRAM Blocks
Efinity v2019.3