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SPI driver API definitions.
This file provides data structures and APIs for controlling the SPI peripheral on the EfxSapphireSoC platform.
Definition in file spi.h.
Data Structures | |
| struct | spi_hwreg_t |
| SPI hardware register map. More... | |
| struct | spi_instance_t |
| SPI instance. Holds the software registers and hardware pointer. More... | |
Macros | |
SPI_CMD Register Bits | |
Offset: 0x00 | |
| #define | SPI_CMD_DATA_MASK 0xFF |
| Mask for Data to be transmitted. | |
| #define | SPI_CMD_WR (1 << 8) |
| Write Trigger. | |
| #define | SPI_CMD_RD (1 << 9) |
| Read Trigger. | |
| #define | SPI_CMD_SS (1 << 11) |
| Slave Select Trigger. | |
| #define | SPI_CMD_READ_INVALID (1 << 31) |
| Read Data Invalid Flag. | |
SPI_RSP Register Bits | |
Offset: 0x04 | |
| #define | SPI_RSP_CMD_FIFO_AVAILABILITY (0xFFFF) |
| Mask for CMD FIFO count. | |
| #define | SPI_RSP_FIFO_OCCUPANCY (0xFFFF << 16) |
| Mask for RSP FIFO count. | |
SPI_CONFIG Register Bits | |
Offset: 0x08 | |
| #define | SPI_CONFIG_CPOL (1 << 0) |
| Clock Pola. | |
| #define | SPI_CONFIG_MODE (1 << 4) |
| Line Mode (Dual/Q. | |
| #define | SPI_CONFIG_CPHA (1 << 16) |
| Clock P. | |
SPI_INTERRUPT Register Bits | |
Offset: 0x0C | |
| #define | SPI_INTC_CMD_INT_ENABLE (1 << 0) |
| Command FIFO Empty Interrupt En. | |
| #define | SPI_INTC_RSP_INT_ENABLE (1 << 1) |
| Response FIFO Valid Interrupt En. | |
| #define | SPI_CMD_INT (1 << 8) |
| Command Interrupt St. | |
| #define | SPI_RSP_INT (1 << 9) |
| Response Interrupt St. | |
| #define | SPI_CMD_VALID (1 << 16) |
| Command Valid S. | |
Enumerations | |
Configuration Enums | |
Enums used for driver initialization. | |
| enum | cfg_mode { FULL_DUPLEX_SINGLE_LINE = 0 , HALF_DUPLEX_DUAL_LINE = 1 , HALF_DUPLEX_QUAD_LINE = 2 } |
| SPI transfer mode configuration. More... | |
| enum | cfg_cpol { LOW = 0 , HIGH = 1 } |
| SPI clock polarity configuration. More... | |
| enum | cfg_cpha { DATA_SAMPLED_RISE_EDGE = 0 , DATA_SAMPLED_FALL_EDGE = 1 } |
| SPI clock phase configuration. More... | |
Functions | |
| u8 | spi_read (spi_instance_t *inst) |
| Read 8-bit SPI data. | |
| u8 | spi_writeRead (spi_instance_t *inst, u8 data) |
| Write and Read 8-bit SPI data. | |
| u32 | spi_read32 (spi_instance_t *inst) |
| Read 32-bit SPI data. | |
| u32 | spi_rspOccupancy (spi_instance_t *inst) |
| Check SPI response FIFO occupancy. | |
| u32 | spi_cmdAvailability (spi_instance_t *inst) |
| Check SPI command FIFO availability. | |
| u32 | spi_isBusy (spi_instance_t *inst) |
| Check SPI if it has any command waiting to be executed in queue. | |
| u32 | spi_writeRead32 (spi_instance_t *inst, u32 data) |
| Write and Read 32-bit SPI data. | |
| void | spi_applyConfig (spi_instance_t *inst) |
| Apply stored SPI configuration to hardware. | |
| void | spi_waitUntilIdle (spi_instance_t *inst) |
| Wait for SPI if any command waiting to be executed. | |
| void | spi_write (spi_instance_t *inst, u8 data) |
| Write 8-bit SPI data. | |
| void | spi_write32 (spi_instance_t *inst, u32 data) |
| Write 32-bit SPI data. | |
| void | spi_select (spi_instance_t *inst, u32 cs) |
| Assert SPI Chip Select. | |
| void | spi_diselect (spi_instance_t *inst, u32 cs) |
| De-assert SPI Chip Select. | |
| void | spi_setDataMode (spi_instance_t *inst, enum cfg_mode mode) |
| Set SPI data transfer mode. | |