21#define PLIC ((plic_hwreg_t *)SYSTEM_PLIC_CTRL)
30 volatile uintptr_t mhartid =
csr_read(mhartid);
31 return PLIC->regs_context[mhartid*2].CLAIM;
36 volatile uintptr_t mhartid =
csr_read(mhartid);
37 PLIC->regs_context[mhartid*2].CLAIM = gateway;
57 PLIC->regs_enable[inst->
target].ENABLE[group] = current | intr_en;
59 PLIC->regs_enable[inst->
target].ENABLE[group] = current & ~intr_en;
70 return PLIC->regs_context[inst->
target].THRESHOLD;
void plic_set_priority(plic_instance_t *inst)
Set priority value to PLIC register.
u32 plic_get_threshold(plic_instance_t *inst)
Read value from PLIC register.
void plic_releaseExtIRQ_m(u32 gateway)
Release ID source from external IRQ.
void plic_applyConfig(plic_instance_t *inst)
Apply stored PLIC configuration to hardware.
u32 plic_get_priority(plic_instance_t *inst)
Read value from PLIC register.
void plic_set_threshold(plic_instance_t *inst)
Set threshold value to PLIC register.
void plic_set_enable(plic_instance_t *inst)
Set enable value to PLIC register.
u32 plic_claimExtIRQ_m()
Initialize the PLIC instance with a base address. Calculates the internal pointers for the register b...
#define csr_read(csr)
This function is used to read the value of a CSR.
void plic_release(plic_instance_t *inst)
u32 plic_claim(plic_instance_t *inst)
PLIC driver API definitions.
PLIC instance. Holds the software registers and hardware pointer.
u32 gateway
Interrupt source ID.
u32 target
Set Target to handler external interrupt.
u32 priority
Priority Level: 0=Disable, 1=Low, 3=Highest.
u32 enable
Interrupt Enable Bit (1=Enable).
u32 threshold
CPU accepts any priority > 0.