Customizing the MIPI D-PHY TX Controller

You can choose to generate the testbench when generating the core in the IP Manager Configuration window. To generate testbench, the Testbench Deliverables Option signals must be enabled.

Note: You must include all .v files generated in the /Testbench directory in your simulation.
Important: tested the testbench generated with the default parameter options only.

provides a simulation script for you to run the testbench quickly using the Modelsim software. To run the Modelsim testbench script, run vsim -do modelsim.do in a terminal application. You must have Modelsim installed on your computer to use this script.

Table 1. MIPI D-PHY TX Controller Core Parameter
Name Option Description
tLPX (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 50
HS BYTECLK (MHz) 10 – 187 MIPI parallel clock frequency in MHz to support data rate of 80 Mbps to 1,500 Mbps.
Default: 100
Data Lane 1, 2, 4, 8 Number of data lanes.
Default: 4
DPHY Clock Mode Continuous, Discontinuous Enables discontinuous or continuous HS clock.
Default: continuous
tLP_EXIT (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 100
tWAKEUP (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 1000
tHS_EXIT (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 100
tHS_ZERO (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 105
tHS_TRAIL (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns before adding 4UI.
Actual THS TRAIL = tHS_TRAIL_NS + 4UI or 8UI (whichever bigger).
Default: 60
tCLK_ZERO (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 262
tCLK_TRAIL (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 60
tCLK_POST (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns before adding 52 UI .
Default: 60
tCLK_PREPARE (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 38
tCLK_PRE (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns .
Default: 10
Bus Turnaround Timeout (ns) – Bus turnaround timeout parameter in ns. If the D-PHY RX does not respond within this period, D-PHY TX ends the turnaround request.
Applicable to bidirectional mode only.
Default: 100000
tD_TERM_EN (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Applicable to bidirectional mode only.
Default: 35
tHS_PREPARE_ZERO (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Applicable to bidirectional mode only.
Default: 145
Enable Bidir Mode 0 or 1 Enable bidirectional data lane.
Applicable to bidirectional mode only.
Default: 1
CLOCK_FREQ_MHZ 40 - 100 Core clock frequency in MHz.
Default: 100
tHS_PREPARE (ns) Values according to MIPI D-PHY specifications. Soft D-PHY timing parameter in ns.
Default: 40