• Ti375 Data Sheet: Introduction
  • Ti375 Features
    • Ti375 Available Package Options
  • Ti375 Device Core Functional Description
    • Ti375 XLR Cell
    • Ti375 Embedded Memory
      • Ti375 True Dual-Port Mode
      • Ti375 Simple Dual-Port Mode
    • Ti375 DSP Block
    • Ti375 Clock and Control Network
      • Ti375 Clock Sources that Drive the Global and Regional Networks
      • Ti375 Driving the Global Network
      • Ti375 Driving the Regional Network
      • Ti375 Driving the Local Network
  • Ti375 Device Interface Functional Description
    • Ti375 Interface Block Connectivity
    • Ti375 GPIO
      • Ti375 Features for HVIO and HSIO Configured as GPIO
        • Ti375 Double-Data I/O
        • Ti375 Programmable Delay Chains
      • Ti375 HVIO
      • Ti375 HSIO
        • Ti375 HSIO Configured as GPIO
        • Ti375 HSIO Configured as LVDS
        • Ti375 HSIO Configured as MIPI Lane
      • Ti375 I/O Banks
    • Ti375 DDR DRAM Interface
    • Ti375 MIPI D-PHY
      • Ti375 MIPI RX D-PHY
      • Ti375 MIPI TX D-PHY
    • Ti375 Oscillator
    • Ti375 Fractional PLL
      • Ti375 Reference Clock Resource Assignments
      • Ti375 Programmable Duty Cycle
      • Ti375 Fractional Output Divider
      • Ti375 Spread-Spectrum Clocking
      • Ti375 Dynamic PLL Reconfiguration
      • Ti375 Dynamic Phase Shift
    • Ti375 Spread-Spectrum Clocking PLL
    • Ti375 Hardened RISC-V Block Interface
    • Ti375 Transceiver Interface
    • Ti375 Single-Event Upset Detection
    • Ti375 Internal Reconfiguration Block
  • Ti375 Security Feature
  • Ti375 Power Sequence
    • Ti375 Power-Up Sequence
    • Ti375 Power-Down Sequence
    • Ti375 Power Supply Current Transient
    • Ti375 Unused Resources and Features
  • Ti375 Configuration
    • Ti375 Supported Configuration Modes
  • Ti375 Characteristics and Timing
    • Ti375 DC and Switching Characteristics
    • Ti375 HSIO Electrical and Timing Specifications
    • Ti375 MIPI Electrical Specifications and Timing
      • Ti375 MIPI Reset Timing
    • Ti375 PLL Timing and AC Characteristics
    • Ti375 Configuration Timing
      • Ti375 JTAG Mode
      • Ti375 SPI Active Mode
      • Ti375 SPI Passive Mode
    • Ti375 Transceiver Specifications
  • Ti375 Pinout Description
    • Ti375 Configuration Pins
    • Ti375 Dedicated DDR Pinout
    • Ti375 Dedicated MIPI D-PHY Pinout
    • Ti375 Dedicated Transceiver Pinout
    • Ti375 Pin States
  • Ti375 Interface Floorplan
  • Ti375 Efinity Software Support
  • Ti375 Ordering Codes
  • Ti375 Revision History

Ti375 Characteristics and Timing

The following table shows the specification status for Ti375 packages.

Table 1. Package Status
Package Status
N484 (all other speed grades), C529, N900, N1156 Final
N484 Q3 speed grade Preliminary
  • Ti375 DC and Switching Characteristics
  • Ti375 HSIO Electrical and Timing Specifications
  • Ti375 MIPI Electrical Specifications and Timing
  • Ti375 PLL Timing and AC Characteristics
  • Ti375 Configuration Timing
  • Ti375 Transceiver Specifications