Ti240 Driving the Regional Network

The following figures show the regional network clock sources graphically.

Note: The figures show the regional clock sources driven from the periphery; some FPGAs have additional regional buffers that can only be accessed from the core. You use them by manually instantiating a GBUFCE primitive driven by the core and assigning it to the location of the RBUF

Figure 1. Clock Sources that Drive the Regional Network: Top and Bottom
See Figure 2 and Figure 3 for the left and right conections.

Figure 2. Clock Sources that Drive the Regional Network: Left

Figure 3. Clock Sources that Drive the Regional Network: Right