Sapphire SoC DS Sapphire SoC UG Sapphire HP SoC DS Sapphire HP SoC UG RISC-V Embedded IDE UG Board Support Package
  • RISC-V Embedded IDE UG
  • Introduction
  • Launch Efinity RISC-V Embedded Software IDE
    • Sapphire SoC IDE Backward Compatibility
    • Launching the Efinity RISC-V Embedded Software IDE
    • IDE Launcher from Efinity
    • Optimization Settings
  • Create, Import, and Build a Software Project
    • Create a New Project
    • Import Sample Projects
    • Build
  • Debug with the OpenOCD Debugger
    • Launch the Debug Script
      • Sapphire SoC
      • Sapphire High-Performance RISC-V SoC
    • Debug
    • Debug - Multiple Cores
      • Debug - Single Core
      • Debug - SMP
    • Debug - Daisy Chain
    • Peripheral Register View
    • CSR Register View
    • FreeRTOS View
    • QEMU Emulator
  • Concurrent Debugging
    • Enable Concurrent Debugging
    • Disable Concurrent Debugging
    • Concurrent Debugging with Multiple Devices
    • Semihosting with Concurrent Debugging
  • Boot Sequence
    • Boot Sequence: Case A
    • Boot Sequence: Case B
    • Boot Sequence: Case C
    • Booting Multiple Cores
  • Create Your Own RTL Design
    • Target another FPGA
    • Target another Efinix Board
    • Target Your Own Board
    • Create a Custom AXI4 Master Peripheral
    • Create a Custom APB3 Peripheral
    • Use another DDR DRAM Module (Trion Only)
    • Use the I2C Interface for DDR Calibration
    • Remove Unused Peripherals from the RTL Design
  • Create Your Own Software
    • Deploying an Application Binary
      • Boot from a Flash Device
      • Boot from the OpenOCD Debugger
      • Copy a User Binary to Flash (Efinity Programmer)
    • About the Board Specific Package
    • List of Restructured BSP Files
    • Address Map
      • Sapphire SoC
      • Sapphire High-Performance RISC-V SoC
    • Example Software
      • apb3Demo
      • Axi4Demo Design
      • clintTimerInterruptDemo
      • coremark
      • customInstructionDemo
      • dCacheFlushDemo
      • dhrystone Example
      • fatFSDemo
      • FreeRTOS Examples
      • fpuDemo
      • gpioDemo
      • iCacheFlushDemo
      • inlineAsmDemo
      • lwipIperfServer
      • i2cDemo Example
      • i2cEepromDemo
      • i2cMasterDemo Design
      • i2cMasterInterruptDemo Design
      • i2cSlaveDemo Design
      • memTest Example
      • nestedInterruptDemo
      • oob Example
      • rtcDemo
      • sdhcDemo
      • semihostingDemo
      • smpDemo (for Sapphire SoC)
      • smpDemo (for HRB)
      • spiDemo Example
      • temperatureSensorDemo
      • uartEchoDemo
      • UartInterruptDemo Example
      • userInterruptDemo Example
      • userTimerDemo
  • Third-party Debugger

Debug with the OpenOCD Debugger

About this task

With the development board programmed and the software built, you are ready to configure the OpenOCD debugger and perform debugging. These instructions use the axiDemo example to explain the steps required.

  • Launch the Debug Script
  • Debug
  • Debug - Multiple Cores
  • Debug - Daisy Chain
    (For Sapphire SoC)
  • Peripheral Register View
  • CSR Register View
  • FreeRTOS View
  • QEMU Emulator