51 #define I2C_MODE_CPOL (1 << 0)
52 #define I2C_MODE_CPHA (1 << 1)
58 #define I2C_TX_VALUE (0xFF)
59 #define I2C_TX_VALID (1 << 8)
60 #define I2C_TX_ENABLE (1 << 9)
61 #define I2C_TX_REPEAT (1 << 10)
62 #define I2C_TX_DISABLE_ON_DATA_CONFLICT (1 << 11)
63 #define I2C_RX_VALUE (0xFF)
64 #define I2C_RX_VALID (1 << 8)
65 #define I2C_RX_LISTEN (1 << 9)
71 #define I2C_MASTER_BUSY (1 << 0)
72 #define I2C_MASTER_START (1 << 4)
73 #define I2C_MASTER_STOP (1 << 5)
74 #define I2C_MASTER_DROP (1 << 6)
75 #define I2C_MASTER_RECOVER (1 << 7)
76 #define I2C_MASTER_START_DROPPED (1 << 9)
77 #define I2C_MASTER_STOP_DROPPED (1 << 10)
78 #define I2C_MASTER_RECOVER_DROPPED (1 << 11)
79 #define I2C_SLAVE_STATUS_IN_FRAME (1 << 0)
80 #define I2C_SLAVE_STATUS_SDA (1 << 1)
81 #define I2C_SLAVE_STATUS_SCL (1 << 2)
82 #define I2C_SLAVE_OVERRIDE_SDA (1 << 1)
83 #define I2C_SLAVE_OVERRIDE_SCL (1 << 2)
89 #define I2C_FILTER_7_BITS (0)
90 #define I2C_FILTER_10_BITS (1 << 14)
91 #define I2C_FILTER_ENABLE (1 << 15)
98 #define I2C_WRITE 0x00
119 #define TX_AND_CHECK(inst, byte) \
121 i2c_txByte(inst, (byte)); \
122 i2c_txNackBlocking(inst); \
123 i2c_rxAckWait(inst); \
204 typedef volatile struct
216 typedef volatile struct{
i2c_interrupt_t
I2C Enable Interrupt List.
@ I2C_INTERRUPT_FILTER
Trigger Interrupt when controller act as slave and its addres filter is triggered */.
@ I2C_INTERRUPT_END
Trigger Interrupt when STOP condition is sent */.
@ I2C_INTERRUPT_TX_ACK
Trigger Interrupt when transmit ACK */.
@ I2C_INTERRUPT_CLOCK_GEN_EXIT
Trigger Interrupt when Clock Generation is stop */.
@ I2C_INTERRUPT_TX_DATA
Trigger Interrupt when transmit data */.
@ I2C_INTERRUPT_RESTART
Trigger Interrupt when RESTART condition is sent */.
@ I2C_INTERRUPT_RX_DATA
Trigger Interrupt when receive data */.
@ I2C_INTERRUPT_START
Trigger Interrupt when START condition is sent */.
@ I2C_INTERRUPT_CLOCK_GEN_ENTER
Trigger Interrupt when Clock Generation is start */.
@ I2C_INTERRUPT_RX_ACK
Trigger Interrupt when receive ACK */.
@ I2C_INTERRUPT_DROP
Trigger Interrupt when DROP condition is sent */.
void i2c_clearInterruptFlag(i2c_instance_t *inst, i2c_interrupt_t value)
Clears specific I2C interrupt flags.
void i2c_startMasterBlocking(i2c_instance_t *inst)
Initiate start condition for I2C master mode and waits until the operation is complete.
void i2c_recoverMasterBlocking(i2c_instance_t *inst)
Initiate recover condition for I2C master mode and waits until the operation is complete.
void i2c_setMux(i2c_instance_t *inst, const uint8_t cr)
Set I2C MUX control register.
void i2c_txAckWait(i2c_instance_t *inst)
Waits until the transmission of an ACK signal is complete over the I2C bus.
void i2c_readData_w(i2c_instance_t *inst, u16 regAddr, u8 *data, u32 length)
Read data with a 16-bit register address over I2C.
void i2c_txAck(i2c_instance_t *inst)
Transmits an ACK signal over I2C.
void i2c_restartMasterBlocking(i2c_instance_t *inst)
Initiate restart condition for I2C master mode and waits until the operation is complete.
void i2c_txNack(i2c_instance_t *inst)
Transmits an NACK signal over I2C.
void i2c_stopMaster(i2c_instance_t *inst)
Initiate stop condition for I2C master mode and sets the dropped status if necessary.
void i2c_writeData_b(i2c_instance_t *inst, u8 regAddr, u8 *data, u32 length)
Write data with an 8-bit register address over I2C and check rx ack for each transaction.
void i2c_applyConfig(i2c_instance_t *inst)
Apply the software configuration to the hardware.
void i2c_txByte(i2c_instance_t *inst, u8 byte)
Transmits a byte of data over I2C.
void i2c_enableFilter(i2c_instance_t *inst, u32 filterId, u32 config)
Enables and configures an I2C hardware filter.
u32 i2c_getFilteringHit(i2c_instance_t *inst)
Get Filtering Hit.
u32 i2c_getSlaveOverride(i2c_instance_t *inst)
Get Slave Override.
void i2c_txNackRepeat(i2c_instance_t *inst)
Sends a NACK signal over I2C bus with repeat mode enabled.
void i2c_disableInterrupt(i2c_instance_t *inst, i2c_interrupt_t value)
Disables specific I2C interrupts.
u32 i2c_rxNack(i2c_instance_t *inst)
Checks if the received ACK signal is detected.
u32 i2c_rxAck(i2c_instance_t *inst)
Reads data from I2C receive data register.
u32 i2c_checkMasterBusy(i2c_instance_t *inst)
Checks if the I2C master is busy.
u32 i2c_getSlaveStatus(i2c_instance_t *inst)
Get Slave Status.
void i2c_txAckBlocking(i2c_instance_t *inst)
Sends an ACK signal over the I2C bus and waits until the transmission is complete.
void i2c_startMaster(i2c_instance_t *inst)
Initiate start condition for I2C master mode and sets the dropped status if necessary.
void i2c_txByteRepeat(i2c_instance_t *inst, u8 byte)
Sends a byte over I2C bus with repeat mode enabled.
void i2c_rxAckWait(i2c_instance_t *inst)
Waits until the reception of an ACK signal is complete over the I2C bus.
void i2c_setFilterConfig(i2c_instance_t *inst, u32 filterId, u32 value)
Sets the configuration for an I2C hardware filter.
void i2c_setSlaveOverride(i2c_instance_t *inst, u32 value)
Write values to I2C hardware registers.
u32 i2c_getMasterStatus(i2c_instance_t *inst)
Get Master Status.
void i2c_enableInterrupt(i2c_instance_t *inst, i2c_interrupt_t value)
Enables specific I2C interrupts.
void i2c_listenAck(i2c_instance_t *inst)
configures the I2C controller to listen for ACK signals on the receiver (RX) line.
u32 i2c_getInterruptFlag(i2c_instance_t *inst)
Get Interrupt Flag.
void i2c_readData_b(i2c_instance_t *inst, u8 regAddr, u8 *data, u32 length)
Read data with an 8-bit register address over I2C.
void i2c_dropMaster(i2c_instance_t *inst)
Drops the current I2C master operation.
void i2c_restartMaster(i2c_instance_t *inst)
Initiate restart condition for I2C master mode and sets the dropped status if necessary.
void i2c_txNackBlocking(i2c_instance_t *inst)
Sends an NACK signal over the I2C bus and waits until the transmission is complete.
void i2c_writeData_w(i2c_instance_t *inst, u16 regAddr, u8 *data, u32 length)
Write data with a 16-bit register address over I2C and check rx ack for each transaction.
u32 i2c_getFilteringStatus(i2c_instance_t *inst)
Get Filtering Status.
u32 i2c_rxData(i2c_instance_t *inst)
Reads data from I2C receive data register.
void i2c_stopMasterBlocking(i2c_instance_t *inst)
Initiate stop condition for I2C master mode and waits until the operation is complete.
void i2c_recoverMaster(i2c_instance_t *inst)
Initiate recover condition for I2C master mode and sets the dropped status if necessary.
I2C hardware filter configuration map.
u32 FILTER_CONFIG_1
Offset +0x04: Secondary Filter Config (Addr/Enable) */.
u32 FILTER_CONFIG_0
Offset +0x00: Primary Filter Config (Addr/Enable) */.
I2C hardware register map.
u32 RESERVED2
Address Offset: 0x4C */.
u32 TSU_DATA
Address Offset: 0x30 */.
u32 SLAVE_OVERRIDE
Address Offset: 0x48 */.
u32 tLOW
Address Offset: 0x50 */.
u32 MASTER_STATUS
Address Offset: 0x40 */.
u32 tHIGH
Address Offset: 0x54 */.
i2c_filter_hwreg_t FILTER[3]
Address Offset: 0x8C */.
u32 INTERRUPT_CLEAR
Address Offset: 0x24 */.
u32 RESERVED0[4]
Reserved Space (0x0C to 0x16) */.
u32 HIT_CONTEXT
Address Offset: 0x80 */.
u32 RESERVED3[9]
Reserved Space (0x5C to 0x7C) */.
u32 RX_ACK
Address Offset: 0x0C */.
u32 RESERVED1[3]
Reserved Space (0x34 to 0x3C) */.
u32 TX_DATA
Address Offset: 0x00 */.
u32 TX_ACK
Address Offset: 0x04 */.
u32 SLAVE_STATUS
Address Offset: 0x44 */.
u32 INTERRUPT
Address Offset: 0x20 */.
u32 RX_DATA
Address Offset: 0x08 */.
u32 tBUF
Address Offset: 0x58 */.
u32 SAMPLING_CLOCK_DIVIDER
Address Offset: 0x28 */.
u32 FILTER_STATUS
Address Offset: 0x84 */.
u32 TIMEOUT
Address Offset: 0x2C */.
I2C instance. Holds the software registers and hardware pointer.
u32 tBuf
Bus Free Time between STOP and START */.
u32 timeout
Timeout Value */.
u32 tLow
SCL Low Time */.
i2c_hwreg_t * hwreg
Pointer to Hardware Register Map */.
u32 tsuDat
Data Setup Time */.
u32 tHigh
SCL High Time */.
u32 samplingClockDivider
Sampling Clock Divider */.
u32 slaveAddress
7-bit Slave Address */