Tz325 Pinout Description
The following tables describe the pinouts for power, ground, configuration, and interfaces.
| Function | Description |
|---|---|
| VCC | Core power supply. |
| VCCA_xx | PLL analog power supply. |
| VDD_SOC | Hardened RISC-V block power supply. |
| VCCAUX | 1.8 V auxiliary power supply. |
| VCCIO33_xx | HVIO bank power supply. |
| VCCIO33_xx_yy_zz | Power for HVIO banks that are shorted together. xx, yy, and zz are the bank locations. For example: VCCIO33_BR1_BR2 shorts banks BR1 and BR2. |
| VCCIOxx | HSIO bank power supply. |
| VCCIOxx_yy_zz | Power for HSIO banks that are shorted together. xx, yy,
and zz are the bank locations. For example: VCCIO1B_1C shorts
banks 1B and 1C |
| VQPS | 1.8 V supply for security fuse. During configuration and normal
operation, keep this pin at 0 V. When you want to blow the
security fuses, power this pin up to 1.8 V.
|
| GND | Ground. |
| Function | Direction | Description |
|---|---|---|
| GPIOx_n | I/O | HVIO for user function. User I/O pins are single-ended. |
| GPIOx_n_yyyy | I/O | HVIO or multi-function pin. |
| GPIOx_N_n GPIOx_P_n |
I/O | HSIO transmitter, receiver, or both. |
| GPIOx_N_n_yyyy GPIOx_P_n_yyyy |
I/O | HSIO transmitter, receiver, both, or multi-function. |
|
REF_RES_xx
|
– |
REF_RES is a reference resistor to generate constant current for
the related circuits.
Connect all REF_RES pins to ground
through a 10 kΩ resistor with a tolerance of ±1%.
|
| Function | Direction | Description |
|---|---|---|
| CLKn | Input | Single ended input for global clock and control network resource. The number of inputs is package dependent. |
| CLKn_P/N | Input | Differential input pair for global clock and control network resource. P pins can access to global clock and control network resource if it is in single-ended configuration. |
| EXTFB | Input | PLL external feedback CLKIN. |
| PLLINn | Input | PLL reference clock resource. The number of reference clock resources is package dependent. |