Tz110 Package-Dependent Resources
| Resource | J361 | G400 | J484 | |
|---|---|---|---|---|
| Single-ended GPIO (Maximum) | HVIO LVCMOS: 1.8, 2.5, 3.0, 3.3 V LVTTL: 3.0, 3.3
V |
20 | 74 | 27 |
| HSIO LVCMOS, HSTL: 1.2, 1.5, 1.8 V SSTL: 1.2, 1.35,
1.5, 1.8 V |
110 | 200 | 116 | |
| Differential GPIO (Maximum) | HSIO (LVDS, Differential HSTL, and SSTL) | 54 | 100 | 57 |
| HSIO (MIPI D-PHY Data Lanes) | 45 | 82 | 47 | |
| HSIO (MIPI D-PHY Clock Lanes) | 9 | 17 | 10 | |
| LPDDR4 PHY with memory controller | 1 x16 | – | 1 x32 | |
| MIPI D-PHY Hard Blocks | RX | 2 | – | 4 |
| TX or SSC PLL | 2 | – | 4 | |
| Global clock or control signals from GPIO pins | 20 | 32 | 32 | |
| PLLs | 8 | 8 | 8 | |