T35 I/O Banks

Efinix FPGAs have input/output (I/O) banks for general-purpose usage. Each I/O bank has independent power pins. The number and voltages supported vary by FPGA and package.

The number of banks and the voltages they support vary by package.

Some I/O banks are merged at the package level by sharing VCCIO pins. Merged banks have underscores (_) between banks in the name (e.g., 1B_1C means 1B and 1C are connected).

Table 1. I/O Banks by Package
Package I/O Banks Voltage (V) Banks with DDIO Support Merged Banks
F256 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1B_1C, 1D_1E. 3A_3B_3C, 3D_3E
4A, 4B 3.3
F324 1A - 1E, 2A - 2C, 3A - 3C, 4A, 4B, TR, BR 1.8, 2.5, 3.3 1A - 1E, 3C, TR, BR 1B_1C, 1D_1E, 3C_TR_BR
F400 1A - 1E, 2A - 2C, 3C, 4A, 4B, TR, BR 1.8, 2.5, 3.3 1A - 1E, 3C, TR, BR 3C_TR
Notice: Refer to the T35 Pinout for information on the I/O bank assignments.