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#include <plic.h>

Data Fields

plic_priority_block_t regs_priority
 Address Offset: 0x00.
plic_pending_block_t regs_pending
 Address Offset: 0x1000.
u32 reserved0 [0x1000U/4U-0x20U]
 Address Offset: 0x1080.
plic_enable_block_t regs_enable [8U]
 Address Offset: 0x2000.
u32 reserved1 [(0x00200000 - 0x00002400)/4U]
 Address Offset: 0x2020.
plic_context_block_t regs_context [8U]
 Address Offset: 0x200000.

Detailed Description

PLIC hardware register map.

Note
This is the main structure that maps directly onto the PLIC peripheral memory-mapped register layout.

Definition at line 93 of file plic.h.

Field Documentation

◆ regs_context

plic_context_block_t plic_hwreg_t::regs_context[8U]

Address Offset: 0x200000.

Definition at line 99 of file plic.h.

◆ regs_enable

plic_enable_block_t plic_hwreg_t::regs_enable[8U]

Address Offset: 0x2000.

Definition at line 97 of file plic.h.

◆ regs_pending

plic_pending_block_t plic_hwreg_t::regs_pending

Address Offset: 0x1000.

Definition at line 95 of file plic.h.

◆ regs_priority

plic_priority_block_t plic_hwreg_t::regs_priority

Address Offset: 0x00.

Definition at line 94 of file plic.h.

◆ reserved0

u32 plic_hwreg_t::reserved0[0x1000U/4U-0x20U]

Address Offset: 0x1080.

Definition at line 96 of file plic.h.

◆ reserved1

u32 plic_hwreg_t::reserved1[(0x00200000 - 0x00002400)/4U]

Address Offset: 0x2020.

Definition at line 98 of file plic.h.


The documentation for this struct was generated from the following file:
  • C:/Users/JasonLau/Downloads/workspace_local/GitLab/efx_IP/efx_soc_rv64/embedded_sw/software/standalone/driver/plic/plic.h