Semihosting is a powerful feature that enhances the development and debugging experience when designing embedded software for Sapphire SoC. Semihosting acts as a bridge between user's host machine and the Sapphire SoC. With semihosting, printing debug messages is achievable without the need for additional peripherals like UART. This is beneficial for designs with limited resources where the debug capabilities are not compromised. Efinix integrates the semihosting ability to the bsp_print* APIs. By enabling the ENABLE_SEMIHOSTING_PRINT in bsp.h file, all printing APIs such as bsp_print, bsp_printf, and bsp_printf_full is routed to the semihosting printing where the printout appears in the Efinity RISC-V Embedded Software IDE console instead. No modifications are required for design source code.
The semihosting facilitates communication between the host machine and the targeted embedded system through a debugger. This feature is useful during the development and debugging phases, as it allows user to print debug messages without needing a UART peripheral enabled. Also, this is practically advantageous when user want to omit the UART peripheral in resource-constrained designs.
The semihostingDemo example design clearly illustrates how to leverage semihosting in the Sapphire High-Performance SoC. To activate semihosting, ensure that the ENABLE_SEMIHOSTING_PRINT define is set to 1 in the bsp.h header file. This enables the seamless output of debug messages. All UART printing calls, e.g., bsp_print, bsp_printf, and other printing APIs, that are available in the bsp.h file is directed to the Efinity RISC-V Embedded Software IDE console. No modifications are required for user's embedded software design.
By default, newlib-nano is used for this demo.
This demonstration showcases the capability of the Efinity RISC-V Embedded Software IDE in printing debug messages and reading them from the console itself:
Open On-Chip Debugger 0.11.0+dev-04060-g967f8f6f0-dirty (2026-03-24-19:53)
Licensed under GNU GPL v2
For bug reports, read
/home/cslau/.efinity/project/RV64_Hard/ip/Soc/Ti375C529_devkit/embedded_sw/Soc
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Info : Simple Register based Bscan Tunnel Selected
Info : Bscan tunnel IR 0x8 selected
Info : Simple Register based Bscan Tunnel Selected
Info : Bscan tunnel IR 0x8 selected
Info : Simple Register based Bscan Tunnel Selected
Info : Bscan tunnel IR 0x8 selected
Info : Simple Register based Bscan Tunnel Selected
Info : Bscan tunnel IR 0x8 selected
Info : set servers polling period to 50ms
Info : clock speed 6000 kHz
Info : JTAG tap: fpga_spinal.bridge tap/device found: 0x006a0a79 (mfg: 0x53c (Efinix Inc), part: 0x06a0, ver: 0x0)
Info : [fpga_spinal.cpu0] datacount=2 progbufsize=2
Info : Disabling abstract command reads from CSRs.
Info : [fpga_spinal.cpu0] Examined RISC-V core; found 4 harts
Info : [fpga_spinal.cpu0] XLEN=64, misa=0x800000000014112d
[fpga_spinal.cpu0] Target successfully examined.
Info : [fpga_spinal.cpu1] datacount=2 progbufsize=2
Info : Disabling abstract command reads from CSRs.
Info : [fpga_spinal.cpu1] Examined RISC-V core; found 4 harts
Info : [fpga_spinal.cpu1] XLEN=64, misa=0x800000000014112d
[fpga_spinal.cpu1] Target successfully examined.
Info : [fpga_spinal.cpu2] datacount=2 progbufsize=2
Info : Disabling abstract command reads from CSRs.
Info : [fpga_spinal.cpu2] Examined RISC-V core; found 4 harts
Info : [fpga_spinal.cpu2] XLEN=64, misa=0x800000000014112d
[fpga_spinal.cpu2] Target successfully examined.
Info : [fpga_spinal.cpu3] datacount=2 progbufsize=2
Info : Disabling abstract command reads from CSRs.
Info : [fpga_spinal.cpu3] Examined RISC-V core; found 4 harts
Info : [fpga_spinal.cpu3] XLEN=64, misa=0x800000000014112d
[fpga_spinal.cpu3] Target successfully examined.
Info : starting gdb server for fpga_spinal.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Info : starting gdb server for fpga_spinal.cpu1 on 3334
Info : Listening on port 3334 for gdb connections
Info : starting gdb server for fpga_spinal.cpu2 on 3335
Info : Listening on port 3335 for gdb connections
Info : starting gdb server for fpga_spinal.cpu3 on 3336
Info : Listening on port 3336 for gdb connections
Info : set servers polling period to 50ms
Info : set servers polling period to 50ms
Info : set servers polling period to 50ms
Started by GNU MCU Eclipse
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting 'gdb' connection on tcp/3333
Info : New GDB Connection: 1, Target fpga_spinal.cpu0, state: halted
Warn : Target Descriptions Supported, but disabled
Warn : Prefer GDB command "target extended-remote :3333" instead of "target remote :3333"
Info : JTAG tap: fpga_spinal.bridge tap/device found: 0x006a0a79 (mfg: 0x53c (Efinix Inc), part: 0x06a0, ver: 0x0)
Info : JTAG tap: fpga_spinal.bridge tap/device found: 0x006a0a79 (mfg: 0x53c (Efinix Inc), part: 0x06a0, ver: 0x0)
Info : Disabling abstract command writes to CSRs.
***Starting Semihosting Demo ***
You should see this printing in your console ..
Echo demo. Key in your string and press enter ..
Efinix
Warn : keep_alive() was not invoked in the 1000 ms timelimit. GDB alive packet not sent! (88636 ms). Workaround: increase "set remotetimeout" in GDB
Echo string: Efinix