irq.c

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// Copyright (C) 2013-2026 Efinix Inc. All rights reserved.
// Full license header bsp/efinix/EfxSapphireSocRV64/include/LICENSE.MD

 
#include <stdint.h>
#include <stddef.h>
#include "irq.h"
 
 
/* ========================================================================== */
/* EXTERNAL INTERRUPT FUNCTIONS (PLIC)                                        */
/* ========================================================================== */

void irq_registerExt(u32 gateway, irq_handler_t handler) 
{
    if (gateway < 64) {
        interrupt_vector_table[gateway] = handler;
    }
}
 
 
/* ========================================================================== */
/* CORE INTERRUPT CONTROL (CSR Operations)                                    */
/* ========================================================================== */

void irq_setTrapVector(void (*trap_vector)(void))
{
    /* Write direct address to mtvec (MODE bits assumed 0 or handled by caller) */
    csr_write(mtvec, (unsigned long)trap_vector);
}

void irq_enable(void)
{
    /* Atomic Set Bit: csrs mstatus, MSTATUS_MIE */
    csr_set(mstatus, MSTATUS_MIE);
}

void irq_disable(void)
{
    /* Atomic Clear Bit: csrc mstatus, MSTATUS_MIE */
    csr_clear(mstatus, MSTATUS_MIE);
}

void irq_setType(cpu_irq_t enable)
{
    csr_set(mie, enable);
}

void irq_clearType(cpu_irq_t disable)
{
    csr_clear(mie, disable);
}