This demo (axiBDemo directory) shows how to use l2cache (blocking method & interrupt method) to flush out data.
For more detail of the driver, refer to L2 Cache Controller Driver
Newlib
By default, newlib-nano is used for this demo.
- See also
- User Debug Configuration - To learn more about User Debug Configuration.
Execution Sequence:
The following shows the expected execution sequence:
***Starting L2 flush and axiB Demo***
Write 4KB data to axiB block ram ..
Read 4KB data from axiB block ram ..
Data is now only available in L2 cache ..
Flush the data to axiB block ram using blocking method ..
Flush done ..
Write another 4KB data to axiB block ram ..
Read 4KB data from axiB block ram ..
Flush the data to axiB block ram using nonblocking method and interrupt..
isr: Flush done ..