docs-html/riscv-api/mtrap_8h_source.html

// Copyright (C) 2013-2026 Efinix Inc. All rights reserved.

// Full license header bsp/efinix/EfxSapphireSocRV64/include/LICENSE.MD


#ifndef MTRAP_H

#define MTRAP_H


#include <stdio.h>

#include "debug.h"

#include "plic/plic.h"


#ifdef __cplusplus

extern "C" {

#endif


/* ========================================================================== */

/* SUB-GROUP 1: ASSEMBLY HELPERS (Context Saving)                               */

/* ========================================================================== */


    #if __riscv_xlen == 64

        #define STORE       "sd"

        #define LOAD        "ld"

        #define GPR_SIZE    "8"

        #define STACK_SIZE  "128"

    #else

        #define STORE       "sw"

        #define LOAD        "lw"

        #define GPR_SIZE    "4"

        #define STACK_SIZE  "64"

    #endif


    #ifdef __riscv_flen // FPU is present

        #undef STACK_SIZE

        #if __riscv_flen == 64 // RV_DF extension

            #define FPR_SIZE "8"

            #define FSTORE  "fsd"

            #define FLOAD   "fld"

            #if __riscv_xlen == 64

            // RV64DF: 128(GPR) + 160(FPR) + 8(FCSR)

                #define STACK_SIZE "304"

            #else

             // RV32DF: 64(GPR) + 160(FPR) + 4(FCSR)

                #define STACK_SIZE "240"

            #endif

        #else // Single Precision FPU

            #define FPR_SIZE "4"

            #define FSTORE  "fsw"

            #define FLOAD   "flw"

            #if __riscv_xlen == 64

             // RV64F: 128(GPR) + 80(FPR) + 8(FCSR)

                #define STACK_SIZE "224"

            #else

            // RV32F: 64(GPR) + 80(FPR) + 4(FCSR)

                #define STACK_SIZE "160"

            #endif

        #endif

    #endif


/* ========================================================================== */

/* SUB-GROUP: FUNCTIONS                                                     */

/* ========================================================================== */


            void  trap_entry(void) __attribute__((naked, aligned(4)));


            int irq_handleDefault(void);

            int irq_handleSoft(void) __attribute__((weak));

            int irq_handleTimer(void) __attribute__((weak));

            void irq_handleExt(void) __attribute__((weak));


            int irq_m_invalid_handler(void);

           int irq_m_uart0_handler(void);

           int irq_m_uart1_handler(void);

            int irq_m_uart2_handler(void);

            int irq_m_spi0_handler(void);

            int irq_m_spi1_handler(void);

            int irq_m_spi2_handler(void);

            int irq_m_i2c0_handler(void);

            int irq_m_i2c1_handler(void);

            int irq_m_i2c2_handler(void);

            int irq_m_i2c3_handler(void);

            int irq_m_i2c4_handler(void);

            int irq_m_gpio0_0_handler(void);

            int irq_m_gpio0_1_handler(void);

            int irq_m_gpio1_0_handler(void);

            int irq_m_gpio1_1_handler(void);

            int irq_m_userTimer0_handler(void);

            int irq_m_userTimer1_handler(void);

            int irq_m_userTimer2_handler(void);

            int irq_m_watchDog0_handler(void);

            int irq_m_axiA_handler(void);

            int irq_m_l2Cache_handler(void);

            int irq_m_user_a_handler(void);

            int irq_m_user_b_handler(void);

            int irq_m_user_c_handler(void);

            int irq_m_user_d_handler(void);

            int irq_m_user_e_handler(void);

            int irq_m_user_f_handler(void);

            int irq_m_user_g_handler(void);

            int irq_m_user_h_handler(void);


        void trap(void) __attribute__((weak));


        void crash(void) __attribute__((weak));


 // End of MTRAP_Funcs group

#ifdef __cplusplus

}

#endif

 // End of MAIN MTRAP Group


#endif // MTRAP_H

debug.h
Debug, logging, and assertion API.

irq_m_gpio1_1_handler
int irq_m_gpio1_1_handler(void)
ID: 19, Handler for GPIO1_1 interrupts.

irq_handleDefault
int irq_handleDefault(void)
Default Fallback Interrupt Handler.
Definition mtrap.c:27

irq_m_user_h_handler
int irq_m_user_h_handler(void)
ID: 39, Handler for User-defined Interrupt H.

irq_handleExt
void irq_handleExt(void)
External Interrupt Handler (PLIC).
Definition mtrap.c:242

irq_m_user_c_handler
int irq_m_user_c_handler(void)
ID: 34, Handler for User-defined Interrupt C.

irq_m_gpio0_0_handler
int irq_m_gpio0_0_handler(void)
ID: 16, Handler for GPIO0_0 interrupts.

irq_m_spi1_handler
int irq_m_spi1_handler(void)
ID: 7, Handler for SPI1 interrupts.

irq_m_user_f_handler
int irq_m_user_f_handler(void)
ID: 37, Handler for User-defined Interrupt F.

irq_m_gpio0_1_handler
int irq_m_gpio0_1_handler(void)
ID: 17, Handler for GPIO0_1 interrupts.

irq_m_userTimer2_handler
int irq_m_userTimer2_handler(void)
ID: 23, Handler for User Timer 2 interrupts.

trap_entry
void trap_entry(void)
The Main Trap Entry Point (Naked).
Definition mtrap.c:129

irq_m_uart1_handler
int irq_m_uart1_handler(void)
ID: 2, Handler for UART1 interrupts.

irq_m_i2c3_handler
int irq_m_i2c3_handler(void)
ID: 14, Handler for I2C3 interrupts.

irq_m_invalid_handler
int irq_m_invalid_handler(void)
ID: 0, Handler for invalid/unassigned interrupts.

irq_m_l2Cache_handler
int irq_m_l2Cache_handler(void)
ID: 31, Handler for L2 Cache Control interrupts.

irq_m_user_e_handler
int irq_m_user_e_handler(void)
ID: 36, Handler for User-defined Interrupt E.

irq_m_i2c0_handler
int irq_m_i2c0_handler(void)
ID: 11, Handler for I2C0 interrupts.

irq_m_userTimer1_handler
int irq_m_userTimer1_handler(void)
ID: 22, Handler for User Timer 1 interrupts.

irq_m_user_g_handler
int irq_m_user_g_handler(void)
ID: 38, Handler for User-defined Interrupt G.

irq_m_userTimer0_handler
int irq_m_userTimer0_handler(void)
ID: 21, Handler for User Timer 0 interrupts.

irq_m_i2c1_handler
int irq_m_i2c1_handler(void)
ID: 12, Handler for I2C1 interrupts.

crash
void crash(void)
Fatal Exception Handler.
Definition mtrap.c:284

irq_m_uart0_handler
int irq_m_uart0_handler(void)
ID: 1, Handler for UART0 interrupts.

irq_m_i2c2_handler
int irq_m_i2c2_handler(void)
ID: 13, Handler for I2C2 interrupts.

irq_m_axiA_handler
int irq_m_axiA_handler(void)
ID: 30, Handler for AXI A interrupts.

irq_handleSoft
int irq_handleSoft(void)
Handlers for CPU interrupts (Software).

irq_m_gpio1_0_handler
int irq_m_gpio1_0_handler(void)
ID: 18, Handler for GPIO1_0 interrupts.

irq_m_watchDog0_handler
int irq_m_watchDog0_handler(void)
ID: 26, Handler for WatchDog Timer interrupts.

irq_m_user_b_handler
int irq_m_user_b_handler(void)
ID: 33, Handler for User-defined Interrupt B.

trap
void trap(void)
Main C Trap Dispatcher.
Definition mtrap.c:304

irq_m_spi0_handler
int irq_m_spi0_handler(void)
ID: 6, Handler for SPI0 interrupts.

irq_m_uart2_handler
int irq_m_uart2_handler(void)
ID: 3, Handler for UART2 interrupts.

irq_handleTimer
int irq_handleTimer(void)
Handlers for CPU interrupts (Timer).

irq_m_spi2_handler
int irq_m_spi2_handler(void)
ID: 8, Handler for SPI2 interrupts.

irq_m_user_d_handler
int irq_m_user_d_handler(void)
ID: 35, Handler for User-defined Interrupt D.

irq_m_i2c4_handler
int irq_m_i2c4_handler(void)
ID: 15, Handler for I2C4 interrupts.

irq_m_user_a_handler
int irq_m_user_a_handler(void)
ID: 32, Handler for User-defined Interrupt A.

plic.h
PLIC driver API definitions.