This example illustrates how to utilize the Sapphire SoC as an I2C master. The program demonstrates the transmission and reception of data, initially with a single byte, and subsequently with a larger chunk of 20 bytes. By default, the configuration assumes the slave device is set to transmit a 1-byte register address. For 2-byte register addresses, you need to modify the definition of WORD_REG_ADDR to 1.
It also demonstrates how the Sapphire SoC operates as an I2C master and utilizes a timeout interrupt mechanism to detect and recover when an I2C slave is not responding. When a timeout occurs (i.e., no slave response within the expected time), the CPU exits the transmission loop and triggers an external interrupt. This prevents the CPU from getting stuck indefinitely during I2C communication errors. Once the I2C master is able to connect to the I2C slave, the program triggers the transmission and reception of data, initially with a single byte, and subsequently with a larger chunk of 20 bytes data. By default, the configuration assumes the slave device is set to transmit a 1 byte register address. For 2-byte register addresses, you need to modify the definition of WORD_REG_ADDR to 1.
For more detail of the driver, refer to I2C Driver
By default, newlib-nano is used for this demo.
The following shows the expected execution sequence: