Machine Mode Trap Handler for exceptions and interrupts.
Exception and interrupt dispatching for the Sapphire SoC.
This module handles low-level context saving and dispatching when the CPU encounters an interrupt or exception.
Generally, users do not need to interact with this module directly. The following describes how the trap system works:
| Component | Behavior |
|---|---|
| trap_entry | Configured as the trap vector in the mtvec register. Automatically manages all traps — no manual handling required. |
| irq_handleSoft / irq_handleTimer | Weakly aliased to irq_handleDefault by default. Override by defining a function with the same name. |
| irq_handleExt | Reads the PLIC claim register to identify the interrupt source, then invokes the corresponding handler. All PLIC handlers are weak aliases to irq_handleDefault. |
Topics | |
| API Functions | |
| Function definitions for interrupt handler, exception. | |
| Assembly Context Helpers | |
| Macros to abstract XLEN (32 vs 64-bit) for inline assembly. | |