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WatchDog Timer Driver

Overview

Watchdog driver API definitions.

The watchdog hardware is designed as following :

  • There is a shared prescaler provide a periodic tick.
  • There is one/multiple counters which increment when the prescaler overflow.
  • Each of those counters will have its own "limit" register which will specify when it will generate its own interrupt.
  • All counters and the "softPanic" can be cleared together by the software executing a heartbeat.
  • Typicaly, the watchdog can be configured to have two counters:
  • Counter 0 would provide an interrupt to let's the CPU handle the issue or shutdown the system cleanly.
  • Counter 1, configured to trigger after counter 0, would be connected in hardware to reset the whole system in a hard way.

Usage & Initialization.

This is an example show how to instantiate WATCHDOG with watchdog_instance_t.

This implementation depends on PLIC Controller Driver for interrupt configuration.

#include "irq.h"
#define WDG_0 ((watchdog_hwreg_t *)SYSTEM_WATCHDOG_CTRL)
#define WATCHDOG_PRESCALER_CYCLE_PER_MS SYSTEM_CLINT_HZ/1000
#define WATCHDOG_TIMEOUT_MS 3000
// Handle the WDG interrupt
.hwreg = WDG_0,
.enable = {0x1U, 0x1U},
.prescaler = WATCHDOG_PRESCALER_CYCLE_PER_MS-1,
.counterLimit = {WATCHDOG_TIMEOUT_MS, 2*WATCHDOG_TIMEOUT_MS},
.heartbeat = 0x0U,
};
plic_instance_t wdg_plic = {
.target = BSP_PLIC_CPU_0,
.gateway = SYSTEM_WATCHDOG_INTERRUPTS_0,
.priority = 0x1U,
.enable = 0x1U,
.threshold = 0x0U,
};
void wdg_isr_init(){
plic_applyConfig(&wdg_plic);
}
#define BSP_PLIC_CPU_0
Primary PLIC CPU 0 External Interrupt base address.
Definition bsp.h:51
void trap_entry(void)
The Main Trap Entry Point (Naked).
Definition mtrap.c:129
void irq_enable(void)
Enable Global Interrupts (MIE bit).
Definition irq.c:56
void irq_setType(cpu_irq_t enable)
Enable specific CPU interrupt sources.
Definition irq.c:76
void irq_setTrapVector(void(*trap_vector)(void))
Set the Machine Trap Vector (mtvec).
Definition irq.c:46
@ IRQ_EXTERNAL
Definition irq.h:122
void plic_applyConfig(plic_instance_t *inst)
Apply stored PLIC configuration to hardware.
Definition plic.c:83
void watchdog_applyConfig(watchdog_instance_t *inst)
Apply the software configuration to the hardware.
Definition watchdog.c:81
RISC-V Core Interrupt Handling and Vector Table.
int irq_m_watchDog0_handler(void)
PLIC instance. Holds the software registers and hardware pointer.
Definition plic.h:137
Watchdog instance. Holds the software registers and hardware pointer.
Definition watchdog.h:175
Watchdog driver API definitions.
See also
Example Watchdog Timer Demo - Learn how to use the driver for watchdog operations

Topics

 API Functions
 Function definitions for Watchdog driver.
 Data Structures
 Structs used by the driver.
 Data Types
 Enums used by the driver.