RV32 SoC DS UG
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Floating Point Unit Demo

This demo (fpuDemo directory) shows how to use the floating-point unit to perform various mathematical operations such as calculating sine, cosine, tangent, square root, and division. The demo records the number of clock cycles needed to complete each calculation.

Users can turn off the floating-point unit in the SoC's IP Configuration wizard to compare the FPU results with those obtained using the base I-extension.

The processing time to obtain the results is faster, and the binary size is smaller when using the F/D-extension with the floating-point unit.

Newlib

By default, newlib-nano is used for this demo.

# Set this in the Makefile.
U_LDFLAGS += -u_printf_float

If the user plans to use no standard library instead, the demo can still be run with our legacy bsp_printf by enabling ENABLE_FLOATING_POINT_SUPPORT in bsp.h.

# Make sure to set NEWLIB to NOSTD in the Makefile.
NEWLIB = NOSTD
See also
User Debug Configuration - To learn more about User Debug Configuration.

Execution Sequence:

The following shows the expected execution sequence:

***Starting FPU Demo***
Sine processing clock cycles: 36
Cosine processing clock cycles: 36
Tangent processing clock cycles: 36
Square root processing clock cycles: 36
Division processing clock cycles: 36
Input 1 (in rad): -0.841471
Sine result: -0.745624
Cosine result: 0.666367
Tangent result: -1.118940
Input 2: 0.416147
Square root result: 0.645094
Division result: 0.113117
***Successfully Ran Demo***