RV32 SoC DS UG
High-Perf RV32 SoC DS UG
RV64 SoC DS UG API and Examples
Embedded IDE UG
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Bootloader

This example (located in the bootloader directory) demonstrates the default launch sequence. Developers can customize the boot sequence of the Sapphire SoC by modifying bootloaderConfig.h.

Launch Sequence

In the default sequence, the bootloader performs the following steps:

  1. Initializes the UART peripheral.
  2. Initializes the SPI flash.
  3. Copies the application code from flash memory into RAM.
  4. Jumps to the user software's memory location to begin execution.

Newlib Support

Note
By default, the -nostdlib flag is used for this demo.

To use newlib-nano, the bootloader linker script (bootloader.ld) must be modified to allocate space for the heap.

1. Locate and remove the original stack portion:

.stack (NOLOAD) : ALIGN(16)
{
PROVIDE( _heap_end = . );
. = __stack_size;
PROVIDE( _sp = . );
} >ram AT>ram :ram

2. Replace it with the following heap and stack definitions:

.heap (NOLOAD) : ALIGN(16) {
PROVIDE( _end = . );
PROVIDE( _heap_start = . );
. += __heap_size;
PROVIDE( _heap_end = . );
PROVIDE( __heap_end = . );
} >ram :ram
.stack (NOLOAD) : ALIGN(16) {
PROVIDE( _stack_end = .);
. += __stack_size; /* Hart 0 */
PROVIDE( _sp = . );
__freertos_irq_stack_top = .;
PROVIDE(_stack_top = .);
} >ram :ram

3. Define the heap size: Add the following line inside the SECTIONS block:

__heap_size = DEFINED(__heap_size) ? __heap_size : 512;

Note: The heap size can be adjusted based on application requirements, provided it does not cause memory collisions.

See also
User Debug Configuration - To learn more about User Debug Configuration.