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T85 Introduction
T85 Features
T85 Available Package Options
T85 Device Core Functional Description
T85 XLR Cell
T85 Logic Cell
T85 Embedded Memory
T85 Multipliers
T85 Global Clock Network
T85 Clock and Control Distribution Network
T85 Global Clock Location
T85 Device Interface Functional Description
T85 Interface Block Connectivity
T85 General-Purpose I/O Logic and Buffer
T85 Complex I/O Buffer
T85 Double-Data I/O
T85 I/O Banks
T85 PLL
T85 LVDS
T85 LVDS TX
T85 LVDS RX
T85 MIPI
T85 MIPI TX
T85 MIPI TX Video Data TYPE[5:0] Settings
T85 MIPI RX
T85 MIPI RX Video Data TYPE[5:0] Settings
T85 D-PHY Timing Parameters
T85 DDR DRAM
T85 DDR Interface Designer Settings
T85 Power Up Sequence
T85 Power Supply Current Transient
T85 Unused Resources and Features
T85 Configuration
T85 Supported Configuration Modes
T85 DC and Switching Characteristics
T85 LVDS I/O Electrical and Timing Specifications
T85 ESD Performance
T85 MIPI Electrical Specifications and Timing
T85 MIPI Power-Up Timing
T85 MIPI Reset Timing
T85 PLL Timing and AC Characteristics
T85 Configuration Timing
T85 SPI Active
T85 SPI Passive
T85 JTAG
T85 Maximum tUSER for SPI Active and Passive Modes
T85 Pinout Description
T85 Pin States
T85 Efinity Software Support
T85 Interface Floorplan
T85 Ordering Codes
T85 Revision History
T85
Ordering Codes
Refer to the
Trion Selector Guide
for the full listing of
T85
ordering codes.