Example Design: PLL with Multiple Output Frequencies

This example design demonstrates how to use a PLL to generate 3 different output frequencies that are output to 3 GPIO pins. The design was compiled with the Efinity® software v2020.1 and targets the Trion T8 BGA81 Development Board. The 33.33 MHz on board oscillator generates the PLL reference clock.

This content is locked and requires you to login before viewing more.